Lei Jiang

According to our database, Lei Jiang authored at least 2 papers between 2010 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2017

A 0.9-μm² 1T1R Bit Cell in 14-nm High-Density Metal Fuse Technology for High-Volume Manufacturing and In-Field Programming.

Zhanping Chen, Sarvesh H. Kulkarni, Vincent E. Dorgan, Salil Manohar Rajarshi, Lei Jiang, Uddalak Bhattacharya

IEEE J. Solid State Circuits, 2017

2010

A 4 kb Metal-Fuse OTP-ROM Macro Featuring a 2 V Programmable 1.37 μ m ² <i>1T1R</i> Bit Cell in 32 nm High-k Metal-Gate CMOS.

Sarvesh H. Kulkarni, Zhanping Chen, Jun He, Lei Jiang, Brian Pedersen, Kevin Zhang

IEEE J. Solid State Circuits, 2010