Lei Deng

Orcid: 0000-0002-5172-9411

Affiliations:
  • University of California at Santa Barbara, Department of Electrical and Computer Engineering, CA, USA
  • Tsinghua University, Beijing, China (PhD 2017)


According to our database1, Lei Deng authored at least 97 papers between 2015 and 2024.

Collaborative distances:

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Bibliography

2024
Brain-Inspired Computing: A Systematic Survey and Future Trends.
Proc. IEEE, June, 2024

Editorial: Understanding and bridging the gap between neuromorphic computing and machine learning, volume II.
Frontiers Comput. Neurosci., 2024

Distance-Forward Learning: Enhancing the Forward-Forward Algorithm Towards High-Performance On-Chip Learning.
CoRR, 2024

Unveiling the Potential of Spiking Dynamics in Graph Representation Learning through Spatial-Temporal Normalization and Coding Strategies.
CoRR, 2024

Enhancing Graph Representation Learning with Attention-Driven Spiking Neural Networks.
CoRR, 2024

Understanding the Functional Roles of Modelling Components in Spiking Neural Networks.
CoRR, 2024

2023
Attention Spiking Neural Networks.
IEEE Trans. Pattern Anal. Mach. Intell., August, 2023

Comprehensive SNN Compression Using ADMM Optimization and Activity Regularization.
IEEE Trans. Neural Networks Learn. Syst., June, 2023

Kronecker CP Decomposition With Fast Multiplication for Compressing RNNs.
IEEE Trans. Neural Networks Learn. Syst., May, 2023

Exploring Adversarial Attack in Spiking Neural Networks With Spike-Compatible Gradient.
IEEE Trans. Neural Networks Learn. Syst., May, 2023

Multi-grained system integration for hybrid-paradigm brain-inspired computing.
Sci. China Inf. Sci., April, 2023

NP-Hardness of Tensor Network Contraction Ordering.
CoRR, 2023

A Unified Structured Framework for AGI: Bridging Cognition and Neuromorphic Computing.
Proceedings of the Artificial General Intelligence - 16th International Conference, 2023

2022
General spiking neural network framework for the learning trajectory from a noisy mmWave radar.
Neuromorph. Comput. Eng., June, 2022

STPAcc: Structural TI-Based Pruning for Accelerating Distance-Related Algorithms on CPU-FPGA Platforms.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Hardware-Enabled Efficient Data Processing With Tensor-Train Decomposition.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

H2Learn: High-Efficiency Learning Accelerator for High-Accuracy Spiking Neural Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Rubik: A Hierarchical Architecture for Efficient Graph Neural Network Training.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Efficient Processing of Sparse Tensor Decomposition via Unified Abstraction and PE-Interactive Architecture.
IEEE Trans. Computers, 2022

A Systematic View of Model Leakage Risks in Deep Neural Network Systems.
IEEE Trans. Computers, 2022

A Comprehensive and Modularized Statistical Framework for Gradient Norm Equality in Deep Neural Networks.
IEEE Trans. Pattern Anal. Mach. Intell., 2022

Towards efficient full 8-bit integer DNN online training on resource-limited devices without batch normalization.
Neurocomputing, 2022

Sampling Methods for Efficient Training of Graph Convolutional Networks: A Survey.
IEEE CAA J. Autom. Sinica, 2022

Spatiotemporal Input Control: Leveraging Temporal Variation in Network Dynamics.
IEEE CAA J. Autom. Sinica, 2022

Toward Robust Spiking Neural Network Against Adversarial Perturbation.
Proceedings of the Advances in Neural Information Processing Systems 35: Annual Conference on Neural Information Processing Systems 2022, 2022

Survey on Graph Neural Network Acceleration: An Algorithmic Perspective.
Proceedings of the Thirty-First International Joint Conference on Artificial Intelligence, 2022

Accelerating Spatiotemporal Supervised Training of Large-Scale Spiking Neural Networks on GPU.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

Spiking Neural Network Integrated Circuits: A Review of Trends and Future Directions.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

A one-for-all and <i>o</i>(<i>v</i> log(<i>v</i> ))-cost solution for parallel merge style operations on sorted key-value arrays.
Proceedings of the ASPLOS '22: 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, 28 February 2022, 2022

2021
Core Placement Optimization for Multi-chip Many-core Neural Network Systems with Reinforcement Learning.
ACM Trans. Design Autom. Electr. Syst., 2021

Effective and Efficient Batch Normalization Using a Few Uncorrelated Data for Statistics Estimation.
IEEE Trans. Neural Networks Learn. Syst., 2021

Target Controllability of Two-Layer Multiplex Networks Based on Network Flow Theory.
IEEE Trans. Cybern., 2021

Practical Attacks on Deep Neural Networks by Memory Trojaning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Nonlinear tensor train format for deep neural network compression.
Neural Networks, 2021

QTTNet: Quantized tensor train neural networks for 3D object and video recognition.
Neural Networks, 2021

Fast Search of the Optimal Contraction Sequence in Tensor Networks.
IEEE J. Sel. Top. Signal Process., 2021

Training and inference for integer-based semantic segmentation network.
Neurocomputing, 2021

Tensor train decomposition for solving large-scale linear equations.
Neurocomputing, 2021

Editorial: Understanding and Bridging the Gap Between Neuromorphic Computing and Machine Learning.
Frontiers Comput. Neurosci., 2021

Advancing Residual Learning towards Powerful Deep Spiking Neural Networks.
CoRR, 2021

ES-ImageNet: A Million Event-Stream Classification Dataset for Spiking Neural Networks.
CoRR, 2021

Hardware Acceleration for GCNs via Bidirectional Fusion.
IEEE Comput. Archit. Lett., 2021

GNNAdvisor: An Adaptive and Efficient Runtime System for GNN Acceleration on GPUs.
Proceedings of the 15th USENIX Symposium on Operating Systems Design and Implementation, 2021

Exploiting Spiking Dynamics with Spatial-temporal Feature Normalization in Graph Learning.
Proceedings of the Thirtieth International Joint Conference on Artificial Intelligence, 2021

SpaceA: Sparse Matrix Vector Multiplication on Processing-in-Memory Accelerator.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

TiAcc: Triangle-inequality based Hardware Accelerator for K-means on FPGAs.
Proceedings of the 21st IEEE/ACM International Symposium on Cluster, 2021

Going Deeper With Directly-Trained Larger Spiking Neural Networks.
Proceedings of the Thirty-Fifth AAAI Conference on Artificial Intelligence, 2021

2020
SemiMap: A Semi-Folded Convolution Mapping for Speed-Overhead Balance on Crossbars.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Scanning the Issue.
Proc. IEEE, 2020

Model Compression and Hardware Acceleration for Neural Networks: A Comprehensive Survey.
Proc. IEEE, 2020

Training high-performance and large-scale deep neural networks with full 8-bit integers.
Neural Networks, 2020

Hybrid tensor decomposition in neural network compression.
Neural Networks, 2020

Compressing 3DCNNs based on tensor train decomposition.
Neural Networks, 2020

Comparing SNNs and RNNs on neuromorphic vision datasets: Similarities and differences.
Neural Networks, 2020

Rethinking the performance comparison between SNNS and ANNS.
Neural Networks, 2020

Tianjic: A Unified and Scalable Chip Bridging Spike-Based and Continuous Neural Computation.
IEEE J. Solid State Circuits, 2020

A deadlock-free physical mapping method on the many-core neural network chip.
Neurocomputing, 2020

Rubik: A Hierarchical Architecture for Efficient Graph Learning.
CoRR, 2020

Kronecker CP Decomposition with Fast Multiplication for Compressing RNNs.
CoRR, 2020

GNNAdvisor: An Efficient Runtime System for GNN Acceleration on GPUs.
CoRR, 2020

Brain-inspired global-local hybrid learning towards human-like intelligence.
CoRR, 2020

Characterizing and Understanding GCNs on GPU.
IEEE Comput. Archit. Lett., 2020

DUET: Boosting Deep Neural Network Efficiency on Dual-Module Architecture.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

Boosting Deep Neural Network Efficiency with Dual-Module Inference.
Proceedings of the 37th International Conference on Machine Learning, 2020

fuseGNN: Accelerating Graph Convolutional Neural Network Training on GPGPU.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

HyGCN: A GCN Accelerator with Hybrid Architecture.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

DeepSniffer: A DNN Model Extraction Framework Based on Learning Architectural Hints.
Proceedings of the ASPLOS '20: Architectural Support for Programming Languages and Operating Systems, 2020

2019
L1-Norm Batch Normalization for Efficient Training of Deep Neural Networks.
IEEE Trans. Neural Networks Learn. Syst., 2019

Transfer Learning in General Lensless Imaging through Scattering Media.
CoRR, 2019

Lossless Compression for 3DCNNs Based on Tensor Train Decomposition.
CoRR, 2019

DashNet: A Hybrid Artificial and Spiking Neural Network for High-speed Object Tracking.
CoRR, 2019

AccD: A Compiler-based Framework for Accelerating Distance-related Algorithms on CPU-FPGA Platforms.
CoRR, 2019

Neural Network Model Extraction Attacks in Edge Devices by Hearing Architectural Hints.
CoRR, 2019

Alleviating Irregularity in Graph Analytics Acceleration: a Hardware/Software Co-Design Approach.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

Balancing Memory Accesses for Energy-Efficient Graph Analytics Accelerators.
Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019

Dynamic Sparse Graph for Efficient Deep Learning.
Proceedings of the 7th International Conference on Learning Representations, 2019

Efficient Mapping without Deadlock on the Many-core Neural Network Chip.
Proceedings of the 15th IEEE International Conference on Control and Automation, 2019

CNNWire: Boosting Convolutional Neural Network with Winograd on ReRAM based Accelerators.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

KPynq: A Work-Efficient Triangle-Inequality Based K-Means on FPGA.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

Memory Trojan Attack on Neural Network Accelerators.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Direct Training for Spiking Neural Networks: Faster, Larger, Better.
Proceedings of the Thirty-Third AAAI Conference on Artificial Intelligence, 2019

2018
GXNOR-Net: Training deep neural networks with ternary weights and activations without full-precision memory under a unified discretization framework.
Neural Networks, 2018

Towards the minimum-cost control of target nodes in directed networks with linear dynamics.
J. Frankl. Inst., 2018

Training deep neural networks with discrete state transition.
Neurocomputing, 2018

Batch Normalization Sampling.
CoRR, 2018

In-memory multiplication engine with SOT-MRAM based stochastic computing.
CoRR, 2018

Direct Training for Spiking Neural Networks: Faster, Larger, Better.
CoRR, 2018

L1-Norm Batch Normalization for Efficient Training of Deep Neural Networks.
CoRR, 2018

Towards a Unified Framework of Matrix Derivatives.
IEEE Access, 2018

Crossbar-Aware Neural Network Pruning.
IEEE Access, 2018

HitNet: Hybrid Ternary Recurrent Neural Network.
Proceedings of the Advances in Neural Information Processing Systems 31: Annual Conference on Neural Information Processing Systems 2018, 2018

TETRIS: TilE-matching the TRemendous Irregular Sparsity.
Proceedings of the Advances in Neural Information Processing Systems 31: Annual Conference on Neural Information Processing Systems 2018, 2018

2017
Spatio-Temporal Backpropagation for Training High-performance Spiking Neural Networks.
CoRR, 2017

Gated XNOR Networks: Deep Neural Networks with Ternary Weights and Activations under a Unified Discretization Framework.
CoRR, 2017

2016
Hierarchical Chunking of Sequential Memory on Neuromorphic Architecture with Reduced Synaptic Plasticity.
Frontiers Comput. Neurosci., 2016

2015
FPGA-based neuromorphic computing system with a scalable routing network.
Proceedings of the 15th Non-Volatile Memory Technology Symposium, 2015

A new computing rule for neuromorphic engineering.
Proceedings of the 15th Non-Volatile Memory Technology Symposium, 2015


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