Lei Cheng

According to our database, Lei Cheng authored at least 9 papers between 2004 and 2008.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2008

A fast simultaneous input vector generation and gate replacement algorithm for leakage power reduction.

Lei Cheng, Deming Chen, Martin D. F. Wong

ACM Trans. Design Autom. Electr. Syst., 2008

DDBDD: Delay-Driven BDD Synthesis for FPGAs.

Lei Cheng, Deming Chen, Martin D. F. Wong

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

2007

Novel CAD Techniques for New Challenges in Deep Sub-Micron VLSI Design

Lei Cheng

PhD thesis, 2007

Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains.

Lei Cheng, Deming Chen, Martin D. F. Wong, Mike Hutton, Jason Govig

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

GlitchMap: An FPGA Technology Mapper for Low Power Considering Glitches.

Lei Cheng, Deming Chen, Martin D. F. Wong

Proceedings of the 44th Design Automation Conference, 2007

2006

Floorplan Design for Multimillion Gate FPGAs.

Lei Cheng, Martin D. F. Wong

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

A fast simultaneous input vector generation and gate replacement algorithm for leakage power reduction.

Lei Cheng, Liang Deng, Deming Chen, Martin D. F. Wong

Proceedings of the 43rd Design Automation Conference, 2006

2005

Floorplanning for 3-D VLSI design.

Lei Cheng, Liang Deng, Martin D. F. Wong

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

Floorplan design for multi-million gate FPGAs.

Lei Cheng, Martin D. F. Wong

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004