Lei Chen
Orcid: 0000-0003-3568-4468Affiliations:
- Southern University of Science and Technology, School of Microelectronics, Shenzhen, China
- Hiroshima University, Higashihiroshima, Japan (PhD 2012)
According to our database1,
Lei Chen
authored at least 45 papers
between 2011 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2024
Stereo Matching Accelerator With Re-Computation Scheme and Data-Reused Pipeline for Autonomous Vehicles.
IEEE Trans. Circuits Syst. I Regul. Pap., June, 2024
Live Demonstration: A 1920×1080 129fps 4.3pJ/pixel Stereo-Matching Processor for Low-power Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2023
IEEE Trans. Circuits Syst. I Regul. Pap., November, 2023
An 11.6aF/kPa Mechanical Stress Sensor With 0.808% Temperature-Drift Oscillator for Flip-Chip Packaging.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2023
A Non-Local Means Denoising Co-Processor with Data Reuse Scheme and Dual-Clock Domain for High Resolution Image Sensor.
Proceedings of the IEEE International Conference on Integrated Circuits, 2023
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
Proceedings of the 15th IEEE International Conference on ASIC, 2023
Live Demonstration: Supervised-learning-based Visual Quantification for Image Enhancement.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
2022
Asynchronous Double-Frame-Exposure Binocular-Camera With Pixel-Level Pipeline Architecture for High-Speed Motion Tracking.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
A Compact Hardware Architecture for Bilateral Filter With the Combination of Approximate Computing and Look-Up Table.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
A 4.29nJ/pixel Stereo Depth Coprocessor With Pixel Level Pipeline and Region Optimized Semi-Global Matching for IoT Application.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Five-Direction Occlusion Filling with Five Layer Parallel Two-Stage Pipeline for Stereo Matching with Sub-Pixel Disparity Map Estimation.
Sensors, 2022
Post-Processing Refinement for Semi-Global Matching Algorithm Based on Real-Time FPGA.
Proceedings of the 35th IEEE International System-on-Chip Conference, 2022
A 14.39ppm/kPa Stress Sensor with Low Temperature-drift and High Linearity for turbulence Stress.
Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022
2021
Real-Time FPGA-Based Binocular Stereo Vision System with Semi-Global Matching Algorithm.
Proceedings of the 34th IEEE International System-on-Chip Conference, 2021
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021
A Pseudo 943 million Frames Per Rate High-Speed Camera with Asynchronous Double-Frame Exposure for Motion Estimation.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021
A 139 fps pixel-level pipelined binocular stereo vision accelerator with region-optimized semi-global matching.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
2020
FPGA-Based Low-Visibility Enhancement Accelerator for Video Sequence by Adaptive Histogram Equalization With Dynamic Clip-Threshold.
IEEE Trans. Circuits Syst., 2020
A Multi-Class Objects Detection Coprocessor With Dual Feature Space and Weighted Softmax.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
A Multi-Core Object Detection Coprocessor for Multi-Scale/Type Classification Applicable to IoT Devices.
Sensors, 2020
2019
Energy-Efficient Hardware Implementation of Road-Lane Detection Based on Hough Transform with Parallelized Voting Procedure and Local Maximum Algorithm.
IEICE Trans. Inf. Syst., 2019
2018
Resource-Efficient Object-Recognition Coprocessor With Parallel Processing of Multiple Scan Windows in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2018
A Hardware Architecture for Cell-Based Feature-Extraction and Classification Using Dual-Feature Space.
IEEE Trans. Circuits Syst. Video Technol., 2018
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
2017
Real-Time Straight-Line Detection for XGA-Size Videos by Hough Transform with Parallelized Voting Procedures.
Sensors, 2017
A Vector-Quantization Compression Circuit With On-Chip Learning Ability for High-Speed Image Sensor.
IEEE Access, 2017
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2016
IEEE Trans. Multi Scale Comput. Syst., 2016
Actuator-Control Circuit Based on OTFTs and Flow-Rate Estimation for an All-Organic Fluid Pump.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2016
k Nearest Neighbor Classification Coprocessor with Weighted Clock-Mapping-Based Searching.
IEICE Trans. Electron., 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Pixel-based pipeline hardware architecture for high-performance Haar-like feature extraction.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
2015
Mixed-domain compact modeling framework for fluid flow driven by electrostatic organic actuators.
Proceedings of the 45th European Solid State Device Research Conference, 2015
Word-parallel associative memory for k-nearest-neighbor with configurable storage space of reference vectors.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015
2014
Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2014
A coprocessor for clock-mapping-based nearest Euclidean distance search with feature vector dimension adaptability.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
LVQ neural network SoC adaptable to different on-chip learning and recognition applications.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014
2012
J. Robotics Mechatronics, 2012
Accuracy of Gradient-Based Optical Flow Estimation in High-Frame-Rate Video Analysis.
IEICE Trans. Inf. Syst., 2012
2011
Proceedings of the 2011 IEEE International Conference on Robotics and Biomimetics, 2011