Leandro A. J. Marzulo
Orcid: 0000-0002-2429-9583
According to our database1,
Leandro A. J. Marzulo
authored at least 41 papers
between 2008 and 2021.
Collaborative distances:
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Bibliography
2021
IEEE Trans. Emerg. Top. Comput., 2021
Gamma - General Abstract Model for Multiset mAnipulation and dynamic dataflow model: An equivalence study.
Concurr. Comput. Pract. Exp., 2021
Concurr. Comput. Pract. Exp., 2021
2020
A multi-improvement local search using dataflow and GPU to solve the minimum latency problem.
Parallel Comput., 2020
Clust. Comput., 2020
Workshop 15: MPP Parallel Programming Models - Special Edition Machine Learning Performance and Security.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020
Proceedings of the 17th ACM International Conference on Computing Frontiers, 2020
2019
J. Hardw. Syst. Secur., 2019
Special issue on parallel applications for <i>in-situ</i> computing on the next-generation computing platforms.
Int. J. High Perform. Comput. Appl., 2019
A dataflow runtime environment and static scheduler for edge, fog and in-situ computing.
Int. J. Grid Util. Comput., 2019
Concurr. Comput. Pract. Exp., 2019
Concurr. Comput. Pract. Exp., 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Exploring the Equivalence between Dynamic Dataflow Model and Gamma - General Abstract Model for Multiset mAnipulation.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019
Proceedings of the 2019 IEEE Intl Conf on Dependable, 2019
Proceedings of the 28th IEEE Asian Test Symposium, 2019
2018
A novel List-Constrained Randomized VND approach in GPU for the Traveling Thief Problem.
Electron. Notes Discret. Math., 2018
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018
A DVND Local Search Implemented on a Dataflow Architecture for the Minimum Latency Problem.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018
Proceedings of the 20th IEEE International Conference on High Performance Computing and Communications; 16th IEEE International Conference on Smart City; 4th IEEE International Conference on Data Science and Systems, 2018
2017
Proceedings of the 2017 International Symposium on Computer Architecture and High Performance Computing Workshops, 2017
Proceedings of the 2017 International Symposium on Computer Architecture and High Performance Computing Workshops, 2017
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017
Proceedings of the High Performance Computing - 4th Latin American Conference, 2017
2016
Proceedings of the 2016 International Symposium on Computer Architecture and High Performance Computing Workshops, 2016
2015
Proceedings of the 2015 International Symposium on Computer Architecture and High Performance Computing Workshops, 2015
Proceedings of the 2015 International Symposium on Computer Architecture and High Performance Computing Workshops, 2015
2014
Parallel Comput., 2014
Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing Workshop, 2014
Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing Workshop, 2014
Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing Workshop, 2014
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014
2011
Int. J. High Perform. Syst. Archit., 2011
2010
Proceedings of the 22nd International Symposium on Computer Architecture and High Performance Computing Workshops, 2010
2009
Proceedings of the CSIE 2009, 2009 WRI World Congress on Computer Science and Information Engineering, March 31, 2009
2008
Transactional WaveCache: Towards Speculative and Out-of-Order DataFlow Execution of Memory Operations.
Proceedings of the 20th International Symposium on Computer Architecture and High Performance Computing, 2008