Lean Karlo S. Tolentino

Orcid: 0000-0002-8014-8229

According to our database1, Lean Karlo S. Tolentino authored at least 18 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
A 13.73 ns Input Time Range TDA Design Based on Adjustable Current Sources Using 40-nm CMOS Process.
Circuits Syst. Signal Process., June, 2024

A 6.25-MHz 3.4-mW Single Clock DPWM Technique Using Matrix Shift Array.
IEEE Trans. Very Large Scale Integr. Syst., May, 2024

A single-chip PFM-controlled LED driver with 0.5% illuminance variation.
Microelectron. J., 2024

2023
A 210-MHz 4.23 fJ Energy/Bit 1-kb Asymmetrical Schmitt-Trigger-Based SRAM Using 40-nm CMOS Process.
IEEE Trans. Circuits Syst. II Express Briefs, October, 2023

A 2xVDD digital output buffer with gate driving stability and non-overlapping signaling control for slew-rate auto-adjustment using 16-nm FinFET CMOS process.
Integr., May, 2023

A 16-nm FinFET 28.8-mW 800-MHz 8-Bit All-N-Transistor Logic Carry Look-Ahead Adder.
Circuits Syst. Signal Process., April, 2023

Passiveless Digitally Controlled Oscillator With Embedded PVT Detector Using 40-nm CMOS.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

A 2.6-GHz I/O Buffer for DDR4 & DDR5 SDRAMs in 16-nm FinFET CMOS Process.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023

2022
A 40-nm CMOS Wide Input Range and Variable Gain Time-Difference Amplifier Based on Current Source Architecture.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A 500-MHz 32-bit DETFF-based Shift Register Utilizing 40-nm CMOS Technology.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

2021
A 40-nm CMOS Multifunctional Computing-in-Memory (CIM) Using Single-Ended Disturb-Free 7T 1-Kb SRAM.
IEEE Trans. Very Large Scale Integr. Syst., 2021

An adaptive constant current and voltage mode P&O-based Maximum Power Point Tracking controller IC using 0.5-μm HV CMOS.
Microelectron. J., 2021

A 2.5-GHz 2×VDD 16-nm FinFET Digital Output Buffer with Slew Rate and Duty Cycle Self-Adjustment.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2021

2019
Utilization of e-Nose Sensory Modality as Add-On Feature for Advanced Driver Assistance System.
CoRR, 2019

Efficiency Improvement of Commercially Available MPPT Controllers Using Boost Converter.
CoRR, 2019

Automated Smart Wick System-Based Microfarm Using Internet of Things.
CoRR, 2019

Development of an IoT-based Aquaponics Monitoring and Correction System with Temperature-Controlled Greenhouse.
Proceedings of the 2019 International SoC Design Conference, 2019

2018
Development of Fertile Egg Detection and Incubation System Using Image Processing and Automatic Candling.
Proceedings of the TENCON 2018, 2018


  Loading...