Laxmidhar Biswal
Orcid: 0000-0002-0446-1731
According to our database1,
Laxmidhar Biswal
authored at least 13 papers
between 2016 and 2024.
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Bibliography
2024
A Dynamic Programming Based Graph Traversal Approach for Efficient Implementation of Nearest Neighbor Architecture in 2D.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024
An Improved Circuit Transformation Technique for Nearest Neighbor Implementation of Quantum Circuits.
Proceedings of the 28th International Symposium on VLSI Design and Test, 2024
2021
Clifford+T-based implementation of fault-tolerant quantum circuits over XOR-Majority Graph.
Microelectron. J., 2021
Fault-tolerant quantum implementation of conventional decoder logic with enable input.
IET Circuits Devices Syst., 2021
2020
Fault-tolerant Quantum Implementation of Priority Encoder Circuit using Clifford+T-group.
Proceedings of the 3rd International Symposium on Devices, Circuits and Systems, 2020
2019
CoRR, 2019
Efficient Implementation of Fault-Tolerant 4: 1 Quantum Multiplexer (QMUX) Using Clifford+T-Group.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2019
Fault-tolerant Quantum Implementation of 1-bit and 4-bit Comparator Circuit using Clifford+T-group.
Proceedings of the 9th International Symposium on Embedded Computing and System Design, 2019
2018
A template-based technique for efficient Clifford+T-based quantum circuit implementation.
Microelectron. J., 2018
Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018
A Heuristic Qubit Placement Strategy for Nearest Neighbor Realization in 2D Architecture.
Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018
2016
Improving the Realization of Multiple-Control Toffoli Gates Using the NCVW Quantum Gate Library.
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016
Proceedings of the 46th IEEE International Symposium on Multiple-Valued Logic, 2016