Laurent Fesquet

Orcid: 0000-0002-6045-8510

According to our database1, Laurent Fesquet authored at least 142 papers between 1998 and 2024.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
Wideband Tunable N-Path Mixer With Calibrated Harmonic Rejection Including the 7th LO Harmonic.
IEEE Trans. Circuits Syst. I Regul. Pap., September, 2024

Data-driven Processing Element for Sparse Convolutional Neural Networks.
Proceedings of the 22nd IEEE Interregional NEWCAS Conference, 2024

2023
Velocity and Color Estimation Using Event-Based Clustering.
Sensors, December, 2023

Method for Data-Driven Pruning in Micropipeline Circuits.
Proceedings of the 31st IFIP/IEEE International Conference on Very Large Scale Integration, 2023

A Generic CDC Modeling for Data Stability Verification.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

Making Digital N-Path Mixers.
Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023

Low-Throughput Event-Based Image Sensors and Processing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022
N-Path Mixer with Wide Rejection Including the 7<sup>th</sup> Harmonic for Low Power Multi-standard Receivers.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022

Self-Timed Ring Oscillators for Non-Overlapping and Overlapping Phases Synthesis.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022

A Novel Event-Based Method for ASK Demodulation.
Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022

An improved event-by-event clustering algorithm for noisy acquisition.
Proceedings of the 8th International Conference on Event-Based Control, 2022

2021
Design and Characterization of an Asynchronous Fixed Priority Tree Arbiter for SPAD Array Readout.
Sensors, 2021

An Area- and Power-Efficient Stochastic Number Generator for Bayesian Sensor Fusion Circuits.
IEEE Des. Test, 2021

A High-Level Design Flow for Locally Body Biased Asynchronous Circuits.
Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021

An Energy Efficient Multi-Rail Architecture for Stochastic Computing: A Bayesian Sensor Fusion Case Study.
Proceedings of the 28th IEEE International Conference on Electronics, 2021

A hybrid event-based pixel for low-power image sensing.
Proceedings of the 28th IEEE International Conference on Electronics, 2021

Self-Timed Ring Oscillator based Time-to-Digital Converter: A 0.35μ m CMOS Proof-of-Concept Prototype.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2021

Comparison between an ASK Event-Based Demodulation and a Digital IQ Demodulation.
Proceedings of the 7th International Conference on Event-Based Control, 2021

An asynchronous hybrid pixel image sensor.
Proceedings of the 27th IEEE International Symposium on Asynchronous Circuits and Systems, 2021

2020
Trojan Detection Test for Clockless Circuits.
J. Electron. Test., 2020

From High-Level Synthesis to Bundled-Data Circuits.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2020

Improved $\pi$-Delayed Harmonic Rejection N-Path Mixer for Low Power Consumption and Multistandard Receiver.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

A Novel Event Based Image Sensor with spacial and temporal redundancy suppression.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

At-speed DfT Architecture for Bundled-data Design.
Proceedings of the IEEE International Test Conference, 2020

An Effective QRS Selection Based on the Level-Crossing Sampling and Activity Selection.
Proceedings of the 6th International Conference on Event-Based Control, 2020

Arbiterless Event-Based Imager Architecture with temporal and spatial redundancies suppression.
Proceedings of the 6th International Conference on Event-Based Control, 2020

A Self-Timed Ring based PUF.
Proceedings of the 26th IEEE International Symposium on Asynchronous Circuits and Systems, 2020

2019
A Digital Event-Based Strategy for ASK demodulation.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

A Distributed Body-Biasing Strategy for Asynchronous Circuits.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

Skilled manpower shortage in microelectronics: a challenge for the French education microelectronics network.
Proceedings of the 18th International Conference on Information Technology Based Higher Education and Training, 2019

An Event-Based Strategy for ASK demodulation.
Proceedings of the 5th International Conference on Event-Based Control, 2019

Time-to-Digital Converters: A Literature Review and New Perspectives.
Proceedings of the 5th International Conference on Event-Based Control, 2019

Comparison of Synchronous and Asynchronous FIR Filter Architectures.
Proceedings of the 5th International Conference on Event-Based Control, 2019

A new synthesis approach for non-uniform filters in the log-scale: Proof of concept.
Proceedings of the 5th International Conference on Event-Based Control, 2019

On-Line Adjustable Precision Computing.
Proceedings of the 14th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2019

From Signal Transition Graphs to Timing Closure: Application to Bundled-Data Circuits.
Proceedings of the 25th IEEE International Symposium on Asynchronous Circuits and Systems, 2019

2018
A body built-in cell for detecting transient faults and dynamically biasing subcircuits of integrated systems.
Microelectron. Reliab., 2018

Architectures of bulk built-in current sensors for detection of transient faults in integrated circuits.
Microelectron. J., 2018

Strategy for higher education in electronic circuits and systems in the perspective of the up-coming digital society.
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

Level Shifter Architecture for Dynamically Biasing Ultra-Low Voltage Subcircuits of Integrated Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

An Asynchronous Fixed Priority Arbiter for High througput Time Correlated Single Photon Counting Systems.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Low Phase-Noise CMOS Quadrature Oscillator based on (N × 4)-stage Self-Timed Ring.
Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018

Non-intrusive testing technique for detection of Trojans in asynchronous circuits.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Subthreshold logic for low-area and energy efficient true random number generator.
Proceedings of the 2018 IEEE Symposium in Low-Power and High-Speed Chips, 2018

Static Timing Analysis of Asynchronous Bundled-Data Circuits.
Proceedings of the 24th IEEE International Symposium on Asynchronous Circuits and Systems, 2018

A Design Flow for Shaping Electromagnetic Emissions in Micropipeline Circuits.
Proceedings of the 24th IEEE International Symposium on Asynchronous Circuits and Systems, 2018

A Cognitive Stochastic Machine Based on Bayesian Inference: A Behavioral Analysis.
Proceedings of the 17th IEEE International Conference on Cognitive Informatics & Cognitive Computing, 2018

2017
On-the-fly and sub-gate-delay resolution TDC based on self-timed ring: A proof of concept.
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017

Innovative practice in the French microelectronics education targeting the industrial needs.
Proceedings of the 2017 IEEE International Conference on Microelectronic Systems Education, 2017

Self-timed Ring based True Random Number Generator: Threat model and countermeasures.
Proceedings of the IEEE 2nd International Verification and Security Workshop, 2017

Detection of Layout-Level Trojans by Monitoring Substrate with Preexisting Built-in Sensors.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Seeking low-power synchronous/asynchronous systems: A FIR implementation case study.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A Bayesian Stochastic Machine for Sound Source Localization.
Proceedings of the IEEE International Conference on Rebooting Computing, 2017

CAR: On the highway towards de-synchronization.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017

A Methodology for Automated Consistency Checking Between Different Power-Aware Descriptions.
Proceedings of the Languages, Design Methods, and Tools for Electronic System Design, 2017

Towards consistency checking between HDL and UPF descriptions.
Proceedings of the 2017 Forum on Specification and Design Languages, 2017

High-level synthesis of an event-driven windowing process.
Proceedings of the 3rd International Conference on Event-Based Control, 2017

Event-based design strategy for circuit electromagnetic compatibility.
Proceedings of the 3rd International Conference on Event-Based Control, 2017

Event-driven image sensor application: Event-driven image segmentation.
Proceedings of the 3rd International Conference on Event-Based Control, 2017

A Practical Framework for Specification, Verification, and Design of Self-Timed Pipelines.
Proceedings of the 23rd IEEE International Symposium on Asynchronous Circuits and Systems, 2017

2016
New asynchronous protocols for enhancing area and throughput in bundled-data pipelines.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

Comparison of low-voltage scaling in synchronous and asynchronous FD-SOI circuits.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016

MOOC and practices in electrical and information engineering: Complementary approaches.
Proceedings of the 15th International Conference on Information Technology Based Higher Education and Training, 2016

Practice in microelectronics education as a mandatory supplement to the future digital-based pedagogy: Strategy of the French national network.
Proceedings of the 11th European Workshop on Microelectronics Education, 2016

Delay partitioning helps reducing variability in 3DVLSI.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

High-level synthesis for event-based systems.
Proceedings of the Second International Conference on Event-based Control, 2016

Levels, peaks, slopes... which sampling for which purpose?
Proceedings of the Second International Conference on Event-based Control, 2016

Asynchronous implementation of an event-driven adaptive FIR filter.
Proceedings of the Second International Conference on Event-based Control, 2016

Simple tri-state logic Trojans able to upset properties of ring oscillators.
Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016

2015
Exploiting reliable features of asynchronous circuits for designing low-voltage components in FD-SOI technology.
Microelectron. Reliab., 2015

A generic clock controller for low power systems: Experimentation on an AXI bus.
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015

Towards multidisciplinarity for microelectronics education: A strategy of the French national network.
Proceedings of the 2015 IEEE International Conference on Microelectronics Systems Education, 2015

Communicating and smart objects: Multidisciplinary topics for the innovative education in microelectronics and its applications.
Proceedings of the 2015 International Conference on Information Technology Based Higher Education and Training, 2015

RTL simulation of an asynchronous reading architecture for an event-driven image sensor.
Proceedings of the International Conference on Event-based Control, 2015

Data sampling and processing: Uniform vs. non-uniform schemes.
Proceedings of the International Conference on Event-based Control, 2015

A method to automatically determine the level-crossing thresholds in non-uniform sampling and processing.
Proceedings of the International Conference on Event-based Control, 2015

2014
Adaptive rate filtering a computationally efficient signal processing approach.
Signal Process., 2014

Designing ultra-low power systems with non-uniform sampling and event-driven logic.
Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014

Self-timed rings as low-phase noise programmable oscillators.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

1-Level crossing sampling scheme for low data rate image sensors.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

FINMINA: A French national project to promote innovation in higher education in microelectronics and nanotechnologies.
Proceedings of the 2014 Information Technology Based Higher Education and Training, 2014

Distributed asynchronous controllers for clock management in low power systems.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

Trends in nanoelectronic education from FDSOI and FinFET technologies to circuit design specifications.
Proceedings of the 10th European Workshop on Microelectronics Education (EWME), 2014

Low data rate architecture for smart image sensor.
Proceedings of the Image Sensors and Imaging Systems 2014, 2014

2013
An Asynchronous FPGA Block with Its Tech-Mapping Algorithm Dedicated to Security Applications.
Int. J. Reconfigurable Comput., 2013

Innovating projects as a pedagogical strategy for the French network for education in microélectronics and nanotechnologies.
Proceedings of the 2013 IEEE International Conference on Microelectronic Systems Education, 2013

A Very High Speed True Random Number Generator with Entropy Assessment.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2013, 2013

Statistical Static Timing Analysis of Conditional Asynchronous Circuits Using Model-Based Simulation.
Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems, 2013

A Self-Timed Ring Based True Random Number Generator.
Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems, 2013

Empirical Recovery of Input Nonlinearity in Distributed Element Models.
Proceedings of the 11th IFAC International Workshop on Adaptation and Learning in Control and Signal Processing, 2013

2012
New pedagogical experiment leading to awareness in nanosciences and nanotechnologies for young generations at secondary school.
Proceedings of the 2012 International Conference on Information Technology Based Higher Education and Training, 2012

Comparison of Self-Timed Ring and Inverter Ring Oscillators as entropy sources in FPGAs.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
Designing a Process Variability Robust Energy-Efficient Control for Complex SoCs.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011

A Secure Asynchronous FPGA Architecture, Experimental Results and Some Debug Feedback
CoRR, 2011

An event-driven FIR filter: Design and implementation.
Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping, 2011

C-elements for Hardened Self-timed Circuits.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011

Does asynchronous technology bring robustness in synchronous circuit monitoring?
Proceedings of the 2011 Forum on Specification & Design Languages, 2011

Formal Verification of C-element Circuits.
Proceedings of the 17th IEEE International Symposium on Asynchronous Circuits and Systems, 2011

2010
IIR digital filtering of non-uniformly sampled signals via state representation.
Signal Process., 2010

A high-speed high-resolution low-phase noise oscillator using self-timed rings.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

Self-Timed Rings: A Promising Solution for Generating High-Speed High-Resolution Low-Phase Noise Clocks.
Proceedings of the VLSI-SoC: Forward-Looking Trends in IC and Systems Design, 2010

Optimizing and Comparing CMOS Implementations of the C-Element in 65nm Technology: Self-Timed Ring Case.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2010

Targeting ultra-low power consumption with non-uniform sampling and filtering.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Synthesis of asynchronous monitors for critical electronic systems.
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

Delay Insensitivity Does Not Mean Slope Insensitivity!
Proceedings of the 16th IEEE International Symposium on Asynchronous Circuits and Systems, 2010

2009
Constrained Asynchronous Ring Structures for Robust Digital Oscillators.
IEEE Trans. Very Large Scale Integr. Syst., 2009

Adaptive Rate Sampling and Filtering Based on Level Crossing Sampling.
EURASIP J. Adv. Signal Process., 2009

Asynchronous design: A promising paradigm for electronic circuits and systems.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

Updates on the potential of clock-less logics to strengthen cryptographic circuits against side-channel attacks.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

RAT-based formal verification of QDI asynchronous controllers.
Proceedings of the Forum on specification and Design Languages, 2009

Programmable/Stoppable Oscillator Based on Self-Timed Rings.
Proceedings of the 15th IEEE Symposium on Asynchronous Circuits and Systems, 2009

Controlling energy and process variability in System-on-Chips: needs for control theory.
Proceedings of the IEEE International Conference on Control Applications, 2009

2008
An Adaptive Resolution Computationally Efficient Short-Time Fourier Transform.
J. Electr. Comput. Eng., 2008

A Reconfigurable Programmable Logic Block for a Multi-Style Asynchronous FPGA resistant to Side-Channel Attacks
CoRR, 2008

High-Level Time-Accurate Model for the Design of Self-Timed Ring Oscillators.
Proceedings of the 14th IEEE International Symposium on Asynchronous Circuits and Systems, 2008

Physical Design of FPGA Interconnect to Prevent Information Leakage.
Proceedings of the Reconfigurable Computing: Architectures, 2008

2007
A Reconfigurable Cell for a Multi-Style Asynchronous FPGA.
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007

Adaptive Rate Filtering Fora Signal Driven Sampling Scheme.
Proceedings of the IEEE International Conference on Acoustics, 2007

A Novel Asynchronous e-FPGA Architecture for Security Applications.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

Asynchronous online-monitoring of logical and temporal assertions.
Proceedings of the Forum on specification and Design Languages, 2007

Computationally efficient adaptive rate sampling and filtering.
Proceedings of the 15th European Signal Processing Conference, 2007

2006
State-holding in Look-Up Tables: application to asynchronous logic.
Proceedings of the IFIP VLSI-SoC 2006, 2006

Asynchronous Assertion Monitors for multi-Clock Domain System Verification.
Proceedings of the 17th IEEE International Workshop on Rapid System Prototyping (RSP 2006), 2006

Spectral analysis of a signal driven sampling scheme.
Proceedings of the 14th European Signal Processing Conference, 2006

2005
Modular Asynchronous Network-on-Chip: Application to GALS Systems Rapid Prototyping.
Proceedings of the VLSI-SoC: From Systems To Silicon, 2005

Technology Mapping for Area Optimized Quasi Delay Insensitive Circuits.
Proceedings of the VLSI-SoC: From Systems To Silicon, 2005

Asynchronous Systems on Programmable Logic.
Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2005

GALS systems prototyping using multiclock FPGAs and asynchronous network-on-chips.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

A Programmable Logic Architecture for Prototyping Clockless Circuits.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

PSL-based online monitoring of digital systems.
Proceedings of the Forum on specification and Design Languages, 2005

FPGA Architecture for Multi-Style Asynchronous Logic.
Proceedings of the 2005 Design, 2005

2004
La technologie asynchrone au service de la réduction d'énergie dans les systèmes embarqués.
Ann. des Télécommunications, 2004

Asynchronous FIR Filters: Towards a New Digital Processing Chain.
Proceedings of the 10th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2004), 2004

2003
A New Class of Asynchronous A/D Converters Based on Time Quantization.
Proceedings of the 9th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2003), 2003

2002
Dynamic Voltage Scheduling for Real Time Asynchronous Systems.
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002

Low-Power Asynchronous A/D Conversion.
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002

Synthesis of QDI Asynchronous Circuits from DTL-Style Petri-Net.
Proceedings of the 11th IEEE/ACM International Workshop on Logic & Synthesis, 2002

Implementing Asynchronous Circuits on LUT Based FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 2002

High-Level Modeling and Design of Asynchronous Arbiters for On-Chip Communication Systems.
Proceedings of the 2002 Design, 2002

2001
Modeling and Design of Asynchronous Priority Arbiters for On-Chip Communication Systems.
Proceedings of the SOC Design Methodologies, 2001

1999
Implementing Snoop-Coherence Protocol for Future SMP Architectures.
Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999

1998
Optical versus Electronic Bus for Address-Transactions in Future SMP Architectures.
Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques, 1998


  Loading...