Laurent Brunet

According to our database, Laurent Brunet authored at least 12 papers between 2014 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

First Radio-Frequency Circuits Fabricated in Top-Tier of a Full 3D Sequential Integration Process at mmW for 5G Applications.

J. Luge-Alvarez, J. B. David, Alexandre Siligaris, Vincent Puyal, G. Moritz, Tadeu Mota Frutuoso, V. Lapras, Claire Fenouillet-Béranger, Laurent Brunet, P. Vincent, Didier Lattard, Xavier Garros, François Andrieu, Perrine Batude

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

Breakthrough Processes for Si CMOS Devices with BEOL Compatibility for 3D Sequential Integrated more than Moore Analog Applications.

Daphnée Bosch, Abygaël Viey, Tadeu Mota Frutuoso, P. Lheritier, C. Licitra, N. Zerhouni, A. Albouy, Laurent Brunet, A. Magalhaes-Lucas, L. M. B. da Silva, H. Boutry, M. Husien Fahmy Taha Abdelrahman, F. Cristiano, R. Gassilloud, M. Ribotta, G. Romano, William Vandendaele, V. Benevent, M. Opprecht, S. Kerdilès, F. Milesi, F. Mazen, Benoit Sklénard, C. Euvrard-Colnat, Johannes Sturm, A. Lambert, C. Candebage, L. Laraignou, F. Boulard, A. Sarrazin, M. De Souza, Christoforos G. Theodorou, Xavier Garros, Perrine Batude

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2022

Methodology for Active Junction Profile Extraction in thin film FD-SOI Enabling performance driver identification in 500°C devices for 3D sequential integration.

Tadeu Mota Frutuoso, Xavier Garros, Perrine Batude, Laurent Brunet, Joris Lacord, Benoit Sklénard, V. Lapras, Claire Fenouillet-Béranger, M. Ribotta, A. Magalhaes-Lucas, J. Kanyandekwe, R. Kies, G. Romano, Edoardo Catapano, Mikaël Cassé, Jose Lugo-Alvarez, Philippe Ferrari, Fred Gaillard

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2021

Impact of spacer interface charges on performance and reliability of low temperature transistors for 3D sequential integration.

Tadeu Mota Frutuoso, Jose Lugo-Alvarez, Xavier Garros, Laurent Brunet, Joris Lacord, Louis Gerrer, Mikaël Cassé, Edoardo Catapano, Claire Fenouillet-Béranger, François Andrieu, Fred Gaillard, Philippe Ferrari

Proceedings of the IEEE International Reliability Physics Symposium, 2021

2018

A review on opportunities brought by 3D-monolithic integration for CMOS device and digital circuit.

François Andrieu, Perrine Batude, Laurent Brunet, Claire Fenouillet-Béranger, Didier Lattard, Sébastien Thuries, Olivier Billoint, Richard Fournel, Maud Vinet

Proceedings of the 2018 International Conference on IC Design & Technology, 2018

2017

Transistor Temperature Deviation Analysis in Monolithic 3D Standard Cells.

Melanie Brocard, Benoît Mathieu, Jean-Philippe Colonna, Cristiano Santos, Claire Fenouillet-Béranger, Cao-Minh Vincent Lu, Gerald Cibrario, Laurent Brunet, Perrine Batude, François Andrieu, Sébastien Thuries, Olivier Billoint

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Precise EOT regrowth extraction enabling performance analysis of low temperature extension first devices.

Jessy Micout, Quentin Rafhay, Xavier Garros, Mikaël Cassé, Jean Coignus, Luca Pasini, Cao-Minh Vincent Lu, Nils Rambal, Claire Fenouillet-Béranger, Laurent Brunet, G. Romano, R. Gassilloud, Perrine Batude, Maud Vinet, Gérard Ghibaudo

Proceedings of the 47th European Solid-State Device Research Conference, 2017

Guidelines for intermediate back end of line (BEOL) for 3D sequential integration.

Claire Fenouillet-Béranger, S. Beaurepaire, Fabien Deprat, Alexandre Ayres De Sousa, Laurent Brunet, Perrine Batude, Olivier Rozeau, François Andrieu, Paul Besombes, M.-P. Samson, Bernard Previtali, F. Nemouchi, G. Rodriguez, Philippe Rodriguez, R. Famulok, Nils Rambal, Viorel Balan, Z. Saghi, V. Jousseaume, Charles-Antoine Guérin, F. Ibars, F. Proud, D. Nouguier, David Ney, V. Delaye, H. Dansas, X. Federspiel, Maud Vinet

Proceedings of the 47th European Solid-State Device Research Conference, 2017

2016

Recent advances in 3D VLSI integration.

Claire Fenouillet-Béranger, Perrine Batude, Laurent Brunet, Vincent Mazzocchi, Cao-Minh Vincent Lu, Fabien Deprat, Jessy Micout, M.-P. Samson, Bernard Previtali, Paul Besombes, Nils Rambal, François Andrieu, Olivier Billoint, Melanie Brocard, Sébastien Thuries, Gerald Cibrario, Maud Vinet

Proceedings of the International Conference on IC Design and Technology, 2016

Opportunities brought by sequential 3D CoolCube™ integration.

Maud Vinet, Perrine Batude, Claire Fenouillet-Béranger, Laurent Brunet, Vincent Mazzocchi, Cao-Minh Vincent Lu, Fabien Deprat, Jessy Micout, Bernard Previtali, Paul Besombes, Nils Rambal, François Andrieu, Olivier Billoint, Melanie Brocard, Sébastien Thuries, Guillaume Berhault, Cristiano Lopes Dos Santos, Gerald Cibrario, Fabien Clermidy, Daniel Gitlin, Olivier Faynot

Proceedings of the 46th European Solid-State Device Research Conference, 2016

Impact of intermediate BEOL technology on standard cell performances of 3D VLSI.

Melanie Brocard, Guillaume Berhault, Sébastien Thuries, Fabien Clermidy, Perrine Batude, Claire Fenouillet-Béranger, Laurent Brunet, François Andrieu, Fabien Deprat, Joris Lacord, Olivier Rozeau, Gerald Cibrario, Olivier Billoint

Proceedings of the 46th European Solid-State Device Research Conference, 2016

2014

FDSOI bottom MOSFETs stability versus top transistor thermal budget featuring 3D monolithic integration.

Claire Fenouillet-Béranger, Bernard Previtali, Perrine Batude, Fabrice Nemouchi, Mikaël Cassé, Xavier Garros, Lucie Tosti, Nils Rambal, Dominique Lafond, Hugo Dansas, Luca Pasini, Laurent Brunet, Fabien Deprat, Magali Grégoire, M. Mellier, Maud Vinet

Proceedings of the 44th European Solid State Device Research Conference, 2014