Laurence E. Turner

According to our database, Laurence E. Turner authored at least 22 papers between 1984 and 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2006

A C compiler for implementing FPGA based bit-serial DSP systems.

Dan Cyca, Laurence E. Turner

Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

Bit-Serial Digital Filter Implementation using a Custom C Compiler.

Dan Cyca, Laurence E. Turner

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2004

A Field Programmable Bit-Serial Digital Signal Processor.

S. A. Rahim, Laurence E. Turner

Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 2004

Graphics processor unit (GPU) acceleration of finite-difference time-domain (FDTD) algorithm.

Sean E. Krakiwsky, Laurence E. Turner, Michal M. Okoniewski

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003

Rapid Prototyping of Field Programmable Gate Array-Based Discrete Cosine Transform Approximations.

Trevor W. Fox, Laurence E. Turner

EURASIP J. Adv. Signal Process., 2003

A Methodology for Rapid Prototyping Peak-Constrained Least-Squares Bit-Serial Finite Impulse Response Filters in FPGAs.

Alex Carreira, Trevor W. Fox, Laurence E. Turner

EURASIP J. Adv. Signal Process., 2003

The Design of Low-Power Fixed-Point FIR Differentiator IP Blocks.

Trevor W. Fox, Alex Carreira, Laurence E. Turner

Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003

2002

The Automatic Generation of Application Specific Processors.

S. G. Gibb, Laurence E. Turner

Proceedings of the 11th IEEE/ACM International Workshop on Logic & Synthesis, 2002

Low coefficient complexity approximations of the one dimensional discrete cosine transform.

Trevor W. Fox, Laurence E. Turner

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A method of implementing bit-serial LDI ladder filters in FPGAs using JBits.

Alex Carreira, Trevor W. Fox, Laurence E. Turner

Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

Implementing the Discrete Cosine Transform Using the Xilinx Virtex FPGA.

Trevor W. Fox, Laurence E. Turner

Proceedings of the Field-Programmable Logic and Applications, 2002

A Method for Implementing Bit-Serial Finite Impulse Response Digital Filters in FPGAs Using JBits^TM.

Alex Carreira, Trevor W. Fox, Laurence E. Turner

Proceedings of the Field-Programmable Logic and Applications, 2002

Application of FPGA technology to accelerate the finite-difference time-domain (FDTD) method.

Ryan N. Schneider, Laurence E. Turner, Michal M. Okoniewski

Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2002

2001

The design of peak constrained least squares FIR filters with low complexity finite precision coefficients.

Trevor W. Fox, Laurence E. Turner

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

1997

An FPGA implementation of a matched filter detector for spread spectrum communications systems.

T. Mathews, S. G. Gibb, Laurence E. Turner, Peter J. W. Graumann, Michel Fattouche

Proceedings of the Field-Programmable Logic and Applications, 7th International Workshop, 1997

1995

BIT-Serial FIR Filters with CSD Coefficients for FPGAs.

Laurence E. Turner, Peter J. W. Graumann, S. G. Gibb

Proceedings of the Field-Programmable Logic and Applications, 5th International Workshop, 1995

Rapid Hardware Prototyping of Digital Signal Processing Systems Using FPGAs.

Laurence E. Turner, Peter J. W. Graumann

Proceedings of the Field-Programmable Logic and Applications, 5th International Workshop, 1995

Implementation of Fast Fourier Transforms and Discrete Cosine Transforms in FPGAs.

Gopal Panneerselvam, Peter J. W. Graumann, Laurence E. Turner

Proceedings of the Field-Programmable Logic and Applications, 5th International Workshop, 1995

1994

DSP System Synthesis Including Variable Data Path Width.

Bruce A. Johnston, Peter J. W. Graumann, Laurence E. Turner

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993

A method of evaluating the effects of signal quantization at arbitrary locations in recursive digital filters.

Stephen Worthington, Laurence E. Turner

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1991

Pipelined BIT-Serial SYNthesis of Digital Filerting Algorithms.

R. Nagalla, Laurence E. Turner

Proceedings of the VLSI 91, 1991

1984

A bit serial LDI recursive digital filter.

Laurence E. Turner, Peter B. Denyer, David Renshaw

Proceedings of the IEEE International Conference on Acoustics, 1984