Lars Wehmeyer
According to our database1,
Lars Wehmeyer
authored at least 17 papers
between 1999 and 2006.
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Bibliography
2006
Cache-Aware Scratchpad-Allocation Algorithms for Energy-Constrained Embedded Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
Proceedings of the Embedded Computer Systems: Architectures, 2006
Fast, efficient and predictable memory accesses - optimization algorithms for memory architecture aware compilation.
Kluwer, ISBN: 978-1-4020-4821-0, 2006
2005
Fast, efficient and predictable memory accesses: optimization algorithms for memory architecture aware compilation.
PhD thesis, 2005
Proceedings of the 2005 3rd Workshop on Embedded Systems for Real-Time Multimedia, 2005
Influence of Memory Hierarchies on Predictability for Time Constrained Embedded Software.
Proceedings of the 2005 Design, 2005
2004
Proceedings of the 3rd Workshop on Memory Performance Issues, 2004
Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2004
Fast, predictable and low energy memory references through architecture-aware compilation.
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
2003
Proceedings of the Power-Aware Computer Systems, Third International Workshop, 2003
2002
Proceedings of the 2002 Joint Conference on Languages, 2002
Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002
Proceedings of the 2002 Design, 2002
2001
Analysis of the influence of register file size on energyconsumption, code size, and execution time.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001
Proceedings of the Ninth International Symposium on Hardware/Software Codesign, 2001
1999
Functional Specification of Distributed Digital Image Processing Systems by Process Interface Descriptions.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1999