Lars Sundström

Hind Dafallah

Mesrop Daghbashyan

Tayebeh Ghanavati Nejad

Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

2020

A Design Method to Minimize the Impact of Bit Conversion Errors in SAR ADCs.

[BibT_eX]

[DOI]

Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020

A 10-Bit Split-Capacitor SAR ADC with DAC Imbalance Estimation and Calibration.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

A 5 GHz CT $\Delta\sum$ ADC with 250 MHz Signal Bandwidth in 28 nm-FDSOI CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE Nordic Circuits and Systems Conference, 2019

2018

A 28-nm FD-SOI 115-fs Jitter PLL-Based LO System for 24-30-GHz Sliding-IF 5G Transceivers.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2018

2017

A 12b, 1 GSps TI pipelined-SAR converter with 65 dB SFDR through buffer linearization and gain mismatch correction in 28nm FD-SOI.

[BibT_eX]

[DOI]

Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

A 491.52 MHz 840 uW crystal oscillator in 28 nm FD-SOI CMOS for 5G applications.

[BibT_eX]

[DOI]

Christian Elgaard

Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

2016

A 65 nm CMOS Wideband Radio Receiver With ΔΣ-Based A/D-Converting Channel-Select Filters.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2016

Waveform and Numerology to Support 5G Services and Requirements.

[BibT_eX]

[DOI]

Icaro Leonardo Da Silva

IEEE Commun. Mag., 2016

2015

A 0.6-3.0GHz 65nm CMOS radio receiver with ΔΣ-based A/D-converting channel-select filters.

[BibT_eX]

[DOI]

Proceedings of the ESSCIRC Conference 2015, 2015

2014

A Filtering ΔΣ ADC for LTE and Beyond.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2014

A low-power 2nd-order CT ΔΣ modulator with an asynchronous SAR quantizer.

[BibT_eX]

[DOI]

Proceedings of the 2014 NORCHIP, Tampere, Finland, October 27-28, 2014, 2014

An 11mW continuous time delta-Sigma modulator with 20 MHz bandwidth in 65nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013

Complex IF Harmonic Rejection Mixer for Non-Contiguous Dual Carrier Reception in 65 nm CMOS.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2013

Carrier aggregation for LTE-advanced: design challenges of terminals.

[BibT_eX]

[DOI]

Chester Sungchung Park

Anders Wallén

Ali S. Khayrallah

IEEE Commun. Mag., 2013

Design of a Configurable Complex IF Receiver Supporting LTE Carrier Aggregation.

[BibT_eX]

[DOI]

Proceedings of the 77th IEEE Vehicular Technology Conference, 2013

A low-power 2nd-order CT ΔΣ modulator with a single operational amplifier.

[BibT_eX]

[DOI]

Proceedings of the 2013 NORCHIP, Vilnius, Lithuania, November 11-12, 2013, 2013

A receiver for LTE Rel-11 and beyond supporting non-contiguous carrier aggregation.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A 9MHz filtering ADC with additional 2<sup>nd</sup>-order ΔΣ modulator noise suppression.

[BibT_eX]

[DOI]

Proceedings of the ESSCIRC 2013, 2013

2012

A 4.75-34.75 MHz digitally tunable active-RC LPF for >60dB mean RX IRR in 65nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 38th European Solid-State Circuit conference, 2012

2011

Simultaneous Reception and Scanning Using Complex IF Radio Architectures.

[BibT_eX]

[DOI]

Leif R. Wilhelmsson

Fenghao Mu

Proceedings of the 74th IEEE Vehicular Technology Conference, 2011

A continuous time ΔΣ modulator with reduced clock jitter sensitivity through DSCR feedback.

[BibT_eX]

[DOI]

Proceedings of the 2011 NORCHIP, Lund, Sweden, November 14-15, 2011, 2011

A 9-band WCDMA/EDGE transceiver supporting HSPA evolution.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010

Impact of MOS threshold-voltage mismatch in current-steering DACs for CT ΣΔ modulators.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

DT Modeling of Clock Phase-Noise Effects in LP CT DeltaSigma ADCs With RZ Feedback.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2009

Design and Measurement of a CT ΔΣ ADC With Switched-Capacitor Switched-Resistor Feedback.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2009

2007

A 312-MHz CT Δ∑ modulator using a SC feedback DAC with reduced peak current.

[BibT_eX]

[DOI]

Proceedings of the 33rd European Solid-State Circuits Conference, 2007

2003

A time-continuous optimization method for automatic adjustment of gain and phase imbalances in feedforward and LINC transmitters.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002

Bandwidth considerations for a CALLUM transmitter architecture.

[BibT_eX]

[DOI]

Roland Strandberg

Pietro Andreani

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Properties of RF bandpass amplifier topology with Q-enhancing.

[BibT_eX]

[DOI]

L. Durkalec

Thomas Mattsson

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001

Investigation of a highly efficient LINC amplifier topology.

[BibT_eX]

[DOI]

Proceedings of the 54th IEEE Vehicular Technology Conference, 2001

Spectral sensitivity of predistortion linearizer architectures to filter ripple.

[BibT_eX]

[DOI]

Weiyun Shan

Proceedings of the 54th IEEE Vehicular Technology Conference, 2001

An IF CMOS signal component separator chip for LINC transmitters.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

2000

Spectral sensitivity of LINC transmitters to quadrature modulator misalignments.

[BibT_eX]

[DOI]

IEEE Trans. Veh. Technol., 2000

A 200-MHz IF BiCMOS signal component separator for linear LINC transmitters.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2000

A novel design using translinear circuit for linear LINC transmitters.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999

A complex polynomial predistorter chip in CMOS for baseband or IF linearization of RF power amplifiers.

[BibT_eX]

[DOI]

Eric Westesson

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Design and implementation of a CMOS power feedback linearization IC for RF power amplifiers.

[BibT_eX]

[DOI]

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

A chip for linearization of RF power amplifiers using digital predistortion with a bit-parallel complex multiplier.

[BibT_eX]

[DOI]

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Extended analysis of input impedance control of an NMOS-transistor with an inductive series feedback.

[BibT_eX]

[DOI]

Anna-Karin Stenman