Lars Schor
According to our database1,
Lars Schor
authored at least 24 papers
between 2009 and 2016.
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Bibliography
2016
Dynamic many-process applications on many-tile embedded systems and HPC clusters: The EURETILE programming environment and execution platforms.
J. Syst. Archit., 2016
2015
Proceedings of the 2015 International Conference on Embedded Software, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
2014
EURETILE D7.3 - Dynamic DAL benchmark coding, measurements on MPI version of DPSNN-STDP (distributed plastic spiking neural net) and improvements to other DAL codes.
CoRR, 2014
SF3P: a framework to explore and prototype hierarchical compositions of real-time schedulers.
Proceedings of the 25nd IEEE International Symposium on Rapid System Prototyping, 2014
EURETILE Design Flow: Dynamic and Fault Tolerant Mapping of Multiple Applications Onto Many-Tile Systems.
Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2014
Proceedings of the 2014 International Conference on Compilers, 2014
2013
Predictability for timing and temperature in multiprocessor system-on-chip platforms.
ACM Trans. Embed. Comput. Syst., 2013
Efficient Worst-Case Temperature Evaluation for Thermal-Aware Assignment of Real-Time Applications on MPSoCs.
J. Electron. Test., 2013
Reliable and Efficient Execution of Multiple Streaming Applications on Intel's SCC Processor.
Proceedings of the Euro-Par 2013: Parallel Processing Workshops, 2013
Designing Applications with Predictable Runtime Characteristics for the Baremetal Intel SCC.
Proceedings of the Euro-Par 2013: Parallel Processing Workshops, 2013
Exploiting the parallelism of heterogeneous systems using dataflow graphs on top of OpenCL.
Proceedings of the 11th IEEE Symposium on Embedded Systems for Real-time Multimedia, 2013
Distributed stable states for process networks: algorithm, analysis, and experiments on intel SCC.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Expandable process networks to efficiently specify and explore task, data, and pipeline parallelism.
Proceedings of the International Conference on Compilers, 2013
2012
IET Circuits Devices Syst., 2012
Proceedings of the 2012 IEEE 18th Real Time and Embedded Technology and Applications Symposium, 2012
Fast worst-case peak temperature evaluation for real-time applications on multi-core systems.
Proceedings of the 13th Latin American Test Workshop, 2012
Multi-objective mapping optimization via problem decomposition for many-core systems.
Proceedings of the IEEE 10th Symposium on Embedded Systems for Real-time Multimedia, 2012
Scenario-based design flow for mapping streaming applications onto on-chip many-core systems.
Proceedings of the 15th International Conference on Compilers, 2012
2011
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011
Proceedings of the Formal Methods for Components and Objects, 10th International Symposium, 2011
Proceedings of the Formal Methods for Components and Objects, 10th International Symposium, 2011
Proceedings of the 48th Design Automation Conference, 2011
2009
Efficient execution of Kahn process networks on multi-processor systems using protothreads and windowed FIFOs.
Proceedings of the 7th IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia, 2009