Larry Wissel

According to our database1, Larry Wissel authored at least 9 papers between 1999 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2008
Circuit design and modeling for soft errors.
IBM J. Res. Dev., 2008

2007
A 550ps Access-Time Compilable SRAM in 65nm CMOS Technology.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2005
Poster session.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

Modeling leakage in ASIC libraries.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2003
Estimation of Iddq for early chip and technology design decisions.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002
Megagate ASICs for the Thuraya Satellite Digital Signal Processor (invited).
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

Managing soft errors in ASICs.
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2001
Behavioral modeling for timing, noise, and signal integrity analysis.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

1999
Device and circuit design issues in SOI technology.
Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999


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