Lang Zeng

Orcid: 0000-0003-3157-1087

According to our database1, Lang Zeng authored at least 29 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A Novel Search-Based Compute-in-Memory Minimum Values Generation Scheme for Low-Complexity LDPC Min-Sum Decoding.
IEEE Trans. Circuits Syst. II Express Briefs, July, 2024

A Charge-Domain Compute-In-Memory Macro With Cell-Embedded DA Conversion and Two-Stage AD Conversion for Bit-Scalable MAC Operation.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

Optimizing Cox Models with Stochastic Gradient Descent: Theoretical Foundations and Practical Guidances.
CoRR, 2024

New Insights into the Random Telegraph Noise (RTN) in FinFETs at Cryogenic Temperature.
Proceedings of the IEEE International Reliability Physics Symposium, 2024

2023
A Novel 9T1C-SRAM Compute-In-Memory Macro With Count-Less Pulse-Width Modulation Input and ADC-Less Charge-Integration-Count Output.
IEEE Trans. Circuits Syst. I Regul. Pap., October, 2023

The impacts of the individual activity and attractiveness correlation on spreading dynamics in time-varying networks.
Commun. Nonlinear Sci. Numer. Simul., July, 2023

Dynamic Prediction using Time-Dependent Cox Survival Neural Network.
CoRR, 2023

2021
Proposal of High Density Two-Bits-Cell Based NAND-Like Magnetic Random Access Memory.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Fully Single Event Double Node Upset Tolerant Design for Magnetic Random Access Memory.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Design of Magnetic Non-Volatile TCAM With Priority-Decision in Memory Technology for High Speed, Low Power, and High Reliability.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Compact Modeling and Analysis of Voltage-Gated Spin-Orbit Torque Magnetic Tunnel Junction.
IEEE Access, 2020

Voltage-Gated Spin-Hall Effect Based Magnetic Non-Volatile Flip-Flop for High Speed, Low Power and Compact Cell Area.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
A Novel MTJ-Based Non-Volatile Ternary Content-Addressable Memory for High-Speed, Low-Power, and High-Reliable Search Operation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Low-Power, High-Speed and High-Density Magnetic Non-Volatile SRAM Design with Voltage-Gated Spin-Orbit Torque.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2019

Modulation and Demodulation of Digital Frequency Shift Keying System Based on Spin Torque Nano Oscillator with Voltage Controlled Magnetic Anisotropy Effect.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
Hardware Acceleration Implementation of Sparse Coding Algorithm with Spintronic Devices.
Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, 2018

A Novel 15T-4MTJ based Non-volatile Ternary Content-Addressable Memory Cell for High-Speed, Low-Power and High-Reliable Search Operation.
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

2017
Frequency modulation of spin torque nano oscillator with voltage controlled magnetic anisotropy effect.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017

Compact modeling of high spin transfer torque efficiency double-barrier magnetic tunnel junction.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017

Proposal for novel magnetic memory device with spin momentum locking materials.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017

Ultrafast spintronic integrated circuits.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016
All Spin Artificial Neural Networks Based on Compound Spintronic Synapse and Neuron.
IEEE Trans. Biomed. Circuits Syst., 2016

Stochastic spintronic device based synapses and spiking neurons for neuromorphic computation.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016

Spin wave based synapse and neuron for ultra low power neuromorphic computation system.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
NEMO5: Achieving High-end Internode Communication for Performance Projection Beyond Moore's Law.
CoRR, 2015

Realization of neural coding by stochastic switching of magnetic tunnel junction.
Proceedings of the 15th Non-Volatile Memory Technology Symposium, 2015

Channel Modeling and Reliability Enhancement Design Techniques for STT-MRAM.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

Energy-efficient neuromorphic computation based on compound spin synapse with stochastic learning.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
Hole mobility in InSb-based devices: Dependency on surface orientation, body thickness and strain.
Proceedings of the 44th European Solid State Device Research Conference, 2014


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