Lan-Rong Dung

Orcid: 0000-0002-7231-7029

According to our database1, Lan-Rong Dung authored at least 44 papers between 1994 and 2022.

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Bibliography

2022
LiCENt: Low-Light Image Enhancement Using the Light Channel of HSL.
IEEE Access, 2022

2018
On Gaze Estimation Using Integral Projection of Eye Images.
Proceedings of the HCI International 2018, 2018

2017
Offline State-of-Health Estimation for High-Power Lithium-Ion Batteries Using Three-Point Impedance Extraction Method.
IEEE Trans. Veh. Technol., 2017

2016
A robust, intelligent CC-CV fast charger for aging lithium batteries.
Proceedings of the 25th IEEE International Symposium on Industrial Electronics, 2016

2015
An Adaptive Particle Filtering for Solving Occlusion Problems of Video Tracking.
Proceedings of the HCI International 2015 - Posters' Extended Abstracts, 2015

A motion-robust contactless photoplethysmography using chrominance and adaptive filtering.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015

2014
Natural User Interfaces: Cyber-Physical Challenges and Pervasive Applications - A Panel Discussion.
Proceedings of the 2014 IEEE International Conference on Internet of Things, 2014

An SOH estimation system based on time-constant-ratio measurement.
Proceedings of the 23rd IEEE International Symposium on Industrial Electronics, 2014

A hybrid fuel cell-battery power system.
Proceedings of the IECON 2014 - 40th Annual Conference of the IEEE Industrial Electronics Society, Dallas, TX, USA, October 29, 2014

2013
Shadow touching for interactive projectors.
Proceedings of the IEEE International Conference on Acoustics, 2013

A Shadow Touching Technique for Interactive Projector Devices.
Proceedings of the HCI International 2013 - Posters' Extended Abstracts, 2013

2011
A Subsample-Based Low-Power Image Compressor for Capsule Gastrointestinal Endoscopy.
EURASIP J. Adv. Signal Process., 2011

2010
A Wireless Narrowband Imaging Chip for Capsule Endoscope.
IEEE Trans. Biomed. Circuits Syst., 2010

A Content-Motion-Aware Motion Estimation for Quality-Stationary Video Coding.
EURASIP J. Adv. Signal Process., 2010

2008
Fourth-Order Cascaded Sigma Delta Modulator Using Tri-Level Quantization and Bandpass Noise Shaping for Broadband Telecommunication Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

On VLSI design of rank-order filtering using DCRAM architecture.
Integr., 2008

Verification of Dataflow Scheduling.
Int. J. Softw. Eng. Knowl. Eng., 2008

Wide-Range Motion Estimation Architecture with Dual Search Windows or High Resolution Video Coding.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

Two-step windowing technique for wide range motion estimation.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007
A VLSI Progressive Coding for Wavelet-based Image Compression.
IEEE Trans. Consumer Electron., 2007

A 2.5-V 14-bit, 180-mW Cascaded ΣΔ ADC for ADSL2+ Application.
IEEE J. Solid State Circuits, 2007

Verification method of dataflow algorithms in high-level synthesis.
J. Syst. Softw., 2007

2006
A Power-Aware Motion Estimation Architecture Using Content-based Subsampling.
J. Inf. Sci. Eng., 2006

A Parallel-In Folding Technique for High-Order FIR Filter Implementation.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

System-level verification on high-level synthesis of dataflow graph.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A NAND Flash Memory Controller for SD/MMC Flash Memory Card.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

A Subsample-based Motion Estimation for Quality-Stationary Video Coding.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005
A content-based methodology for power-aware motion estimation architecture.
IEEE Trans. Circuits Syst. II Express Briefs, 2005

Dynamic Range Improvement of Multistage Multibit Modulator for Low Oversampling Ratios.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

Design of power-aware multiplier with graceful quality-power trade-offs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Modeling and formal verification of dataflow graph in system-level design using Petri net.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

On reducing leakage quantization noise of multistage Sigma-Delta modulator using nonlinear oscillation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

On multiple-voltage high-level synthesis using algorithmic transformations.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004
A maskable memory architecture for rank-order filtering.
IEEE Trans. Consumer Electron., 2004

A Vario-power ME architecture using content-based subsample algorithm.
IEEE Trans. Consumer Electron., 2004

A power-aware ME architecture using subsample algorithm.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2002
EFBLA: A Two-Phase Matching Algorithm for Fast Motion Estimation.
Proceedings of the Advances in Multimedia Information Processing, 2002

VLSI Implementation for MAC-Level DWT Architecture.
Proceedings of the 2002 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002), 2002

An automated IP synthesizer for limited-resource DWT processor.
Proceedings of the IEEE International Conference on Acoustics, 2002

1999
Rapid prototyping of multimedia chip sets.
Proceedings of the 1999 IEEE International Conference on Acoustics, 1999

1996
VHDL-based rapid system prototyping.
J. VLSI Signal Process., 1996

Conceptual Prototyping of Scalable Embedded DSP Systems.
IEEE Des. Test Comput., 1996

1995
Virtual prototyping of embedded DSP systems.
Proceedings of the 1995 International Conference on Acoustics, 1995

1994
On the Reduction of Recorder Buffer Size for Discrete Fourier Transform Processor Design.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994


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