Lalit Dani

According to our database, Lalit Dani authored at least 6 papers between 2019 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

ABB Assisted Area Efficient Vernier Delay Line Time-to-Digital Converter for Low Voltage Applications.

Ravi, Lomash Chandra Acharya, Mahipal Dargupally, Neha Gupta, Neeraj Mishra, Lalit Mohan Dani, Nilotpal Sarma, Devesh Dwivedi, Sudeb Dasgupta, Anand Bulusu

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023

2022

Delay Modulation in Separately Driven Delay Cells Utilized for the Generation of High-Performance Multiphase Signals Using ROs.

Neeraj Mishra, Lalit Mohan Dani, Sudipto Chakraborty, Rajiv V. Joshi, Anand Bulusu

IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Variation Aware Jitter Estimation Methodology in ROs Considering Over/Undershoots in NTV Regime.

Lalit Mohan Dani, Neeraj Mishra, Bulusu Anand

IEEE Trans. Circuits Syst. II Express Briefs, 2022

2021

An Efficient and Accurate Variation-Aware Design Methodology for Near-Threshold MOS-Varactor-Based VCO Architectures.

Lalit Mohan Dani, Neeraj Mishra, Anand Bulusu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

2020

Design and Realization of High-Speed Low-Noise Multi-Loop Skew-Based ROs Optimized for Even/Odd Multi-Phase Signals.

Neeraj Mishra, Lalit Dani, Kunal Sanvaniya, Sudeb Dasgupta, Sudipto Chakraborty, Anand Bulusu

IEEE Trans. Circuits Syst., 2020

2019

MOS Varactor RO Architectures in Near Threshold Regime Using Forward Body Biasing Techniques.

Lalit Dani, Neeraj Mishra, Bulusu Anand

Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019