L. Hemanth Krishna
Orcid: 0000-0002-7737-6685
According to our database1,
L. Hemanth Krishna
authored at least 7 papers
between 2021 and 2024.
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Bibliography
2024
Energy-Efficient Approximate Multiplier Design With Lesser Error Rate Using the Probability-Based Approximate 4:2 Compressor.
IEEE Embed. Syst. Lett., June, 2024
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
High-Speed Serial and Semi-Parallel IMPLY-based Approximate Adders through Memristors for In-Memory Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2021
Efficient design of 15: 4 counter using a novel 5: 3 counter for high-speed multiplication.
IET Comput. Digit. Tech., 2021
Energy Efficient Approximate Multiplier Design for Image/Video Processing Applications.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021
Proceedings of the 28th IEEE International Conference on Electronics, 2021