L. Guna Sekhar Sai Harsha

According to our database, L. Guna Sekhar Sai Harsha authored at least 4 papers between 2021 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2022

Hardware efficient circuit for low error logarithmic converter.

Bhaskara Rao Jammu, L. Guna Sekhar Sai Harsha, Nalini Bodasingi, Sreehari Veeramachaneni, Noor Mohammad S.

J. Comput. Methods Sci. Eng., 2022

A Low Error, Hardware Efficient Logarithmic Multiplier.

L. Guna Sekhar Sai Harsha, Bhaskara Rao Jammu, Nalini Bodasingi, Sreehari Veeramachaneni, Noor Mohammad S.

Circuits Syst. Signal Process., 2022

2021

Hardware-efficient approximate logarithmic division with improved accuracy.

Chitlu Subhasri, Bhaskara Rao Jammu, L. Guna Sekhar Sai Harsha, Nalini Bodasingi, Visweswara Rao Samoju

Int. J. Circuit Theory Appl., 2021

A low-error, memory-based fast binary antilogarithmic converter.

L. Guna Sekhar Sai Harsha, Bhaskara Rao Jammu, Visweswara Rao Samoju, Sreehari Veeramachaneni, Noor Mohammad S.

Int. J. Circuit Theory Appl., 2021