Kyusik Chung
According to our database1,
Kyusik Chung
authored at least 38 papers
between 1990 and 2013.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2013
A Unified Graphics and Vision Processor With a 0.89 µW/fps Pose Estimation Engine for Augmented Reality.
IEEE Trans. Very Large Scale Integr. Syst., 2013
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012
2011
Concurr. Comput. Pract. Exp., 2011
Clust. Comput., 2011
2010
IEEE J. Solid State Circuits, 2010
Concurr. Comput. Pract. Exp., 2010
A graphics and vision unified processor with 0.89µW/fps pose estimation engine for augmented reality.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2009
A 186-Mvertices/s 161-mW Floating-Point Vertex Processor With Optimized Datapath and Vertex Caches.
IEEE Trans. Very Large Scale Integr. Syst., 2009
Comput. Graph., 2009
Bank-partition and Multi-fetch Scheme for Floating-point Special Function units in Multi-core Systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
A 36 fps SXGA 3-D Display Processor Embedding a Programmable 3-D Graphics Rendering Engine.
IEEE J. Solid State Circuits, 2008
A fast and scalable string matching algorithm using contents correction signature hashing for network IDS.
IEICE Electron. Express, 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the 22nd Annual International Conference on Supercomputing, 2008
Proceedings of the 2008 International Conference on Information Networking, 2008
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
2007
An Energy-Efficient Mobile Vertex Processor With Multithread Expanded VLIW Architecture and Vertex Caches.
IEEE J. Solid State Circuits, 2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the High Performance Computing and Communications, 2007
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007
Load Balanced Parallel Prime Number Generator with Sieve of Eratosthenes on Cluster Computers.
Proceedings of the Seventh International Conference on Computer and Information Technology (CIT 2007), 2007
2006
IEEE J. Solid State Circuits, 2006
A 120Mvertices/s multi-threaded VLIW vertex processor for mobile multimedia applications.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2005
A 3-way SIMD engine for programmable triangle setup in embedded 3D graphics hardware.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
Scalable Cluster Architectures for Wireless Internet Proxy Servers.
Proceedings of the 2nd International Conference Computing, 2004
2003
Artif. Intell. Rev., 2003
A hardware-like high-level language based environment for 3D graphics architecture exploration.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
2000
Proceedings of the 15th International Conference on Pattern Recognition, 2000
1998
Comparison of Feature Performance and Its Application to Feature Combination in Off-Line Handwritten Korean Alphabet Recognition.
Int. J. Pattern Recognit. Artif. Intell., 1998
Proceedings of IAPR Workshop on Machine Vision Applications, 1998
1997
A systematic approach to classifier selection on combining multiple classifiers for handwritten digit recognition.
Proceedings of the 4th International Conference Document Analysis and Recognition (ICDAR '97), 1997
Performance comparison of several feature selection methods based on node pruning in handwritten character recognition.
Proceedings of the 4th International Conference Document Analysis and Recognition (ICDAR '97), 1997
1992
1990
Int. J. Pattern Recognit. Artif. Intell., 1990