Kyung-Wook Shin

According to our database1, Kyung-Wook Shin authored at least 7 papers between 1991 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2025
A High-Performance Point Scalar Multiplier supporting Edwards25519 and Curve25519 Curves.
Proceedings of the International Conference on Electronics, Information, and Communication, 2025

A Hardware Accelerator for High-Speed Computation of Ed25519 and X25519.
Proceedings of the International Conference on Electronics, Information, and Communication, 2025

2021
A Hardware Implementation of Point Scalar Multiplication on Edwards25519 Curve.
Proceedings of the International Conference on Electronics, Information, and Communication, 2021

2019
A Hardware Implementation of SHA3 Hash Processor using Cortex-M0.
Proceedings of the International Conference on Electronics, Information, and Communication, 2019

1998
A 200-MHz complex number multiplier using redundant binary arithmetic.
IEEE J. Solid State Circuits, 1998

1994
An Efficient VLSI Implementation of Vector-Radix 2-D DCT using Mesh-Connected 2-D Array.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1991
A VLSI array processor for 16-point FFT.
IEEE J. Solid State Circuits, September, 1991


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