Kyounghwan Lim
According to our database1,
Kyounghwan Lim
authored at least 3 papers
between 2021 and 2023.
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Bibliography
2023
A 16 GB 1024 GB/s HBM3 DRAM With Source-Synchronized Bus Design and On-Die Error Control Scheme for Enhanced RAS Features.
IEEE J. Solid State Circuits, 2023
2022
A 16 GB 1024 GB/s HBM3 DRAM with On-Die Error Control Scheme for Enhanced RAS Features.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
2021
Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology : Industrial Product.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021