Kyoung-Son Jhang

Orcid: 0000-0001-5659-0503

Affiliations:
  • Chungnam National University, Daejeon, South Korea
  • Hannam University, Daejeon, South Korea (former)
  • Seoul National University, South Korea (PhD 1995)


According to our database1, Kyoung-Son Jhang authored at least 31 papers between 1996 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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Bibliography

2024
Microplastic Binary Segmentation with Resolution Fusion and Large Convolution Kernels.
J. Comput. Sci. Eng., 2024

Enhanced Small Ship Detection Method for Unmanned Surface Navigation Using the Divide and Conquer Approach and ByteTrack.
Proceedings of the International Conference on Electronics, Information, and Communication, 2024

2023
Exploration of Key Point Localization Neural Network Architectures for Y-Maze Behavior Test Automation.
J. Comput. Sci. Eng., September, 2023

2021
Neural Network Analysis for Microplastic Segmentation.
Sensors, 2021

2020
Voting and Ensemble Schemes Based on CNN Models for Photo-Based Gender Prediction.
J. Inf. Process. Syst., 2020

CNN training for age group prediction in an illumination condition.
ICT Express, 2020

2019
CNN Training for Face Photo based Gender and Age Group Prediction with Camera.
Proceedings of the International Conference on Artificial Intelligence in Information and Communication, 2019

2014
Whitelists Based Multiple Filtering Techniques in SCADA Sensor Networks.
J. Appl. Math., 2014

TDMA implementation for simultaneous signal acquisition of machine condition in wireless sensor networks.
Proceedings of the 8th International Conference on Ubiquitous Information Management and Communication, 2014

Whitelist Generation Technique for Industrial Firewall in SCADA Networks.
Proceedings of the Frontier and Innovation in Future Computing and Communications, 2014

2013
A Study of Wireless Sensor Network Routing Protocols for Maintenance Access Hatch Condition Surveillance.
J. Inf. Process. Syst., 2013

2010
Implementation of a Self-Motivated Arbitration Scheme for the Multilayer AHB Busmatrix.
IEEE Trans. Very Large Scale Integr. Syst., 2010

Implementation of an Encoder Based on Parallel Structure for LTE Systems.
Proceedings of the 2010 IEEE Wireless Communications and Networking Conference, 2010

Design and implementation of a radiation tolerant on-board computer for science technology satellite-3.
Proceedings of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems, 2010

2009
USB Data leakage prevention Using hardware based data inspection technique.
Proceedings of the 2009 International Conference on Security & Management, 2009

2008
An Implementation of GSG with Parallel Outputs Targeting MIMO Detector.
Proceedings of the 68th IEEE Vehicular Technology Conference, 2008

Automatic interface synthesis based on the classification of interface protocols of IPs.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007
Asynchronous Layered Interface of Multimedia SoCs for Multiple Outstanding Transactions.
J. VLSI Signal Process., 2007

An implementation and performance analysis of slave-side arbitration schemes for the ML-AHB BusMatrix.
Proceedings of the 2007 ACM Symposium on Applied Computing (SAC), 2007

A Low Cost and Interactive Rapid Prototyping Platform for Digital System Design Education.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

An Efficient Implementation Method of Arbiter for the ML-AHB Busmatrix.
Proceedings of the Embedded Software and Systems, [Third] International Conference, 2007

2006
Automatic Synthesis of Interface Circuits from Simplified IP Interface Protocols and Matching Information.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006

Automatic Synthesis of Interface Circuits from Simplified IP Interface Protocols.
Proceedings of the Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, 2006

2005
Asynchronous Multiple-Issue On-Chip Bus with In-Order/Out-of-Order Completion.
IEICE Trans. Electron., 2005

Differential Value Encoding for Delay Insensitive Handshake Protocol.
IEICE Trans. Inf. Syst., 2005

An improved implementation method of AHB BusMatrix.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

Self-timed Interconnect with Layered Interface Based on Distributed and Modularized Control for Multimedia SoCs.
Proceedings of the Advances in Multimedia Information Processing, 2005

High performance asynchronous on-chip bus with multiple issue and out-of-order/in-order completion.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

2004
A Two-Level On-Chip Bus System Based on Multiplexers.
Proceedings of the Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, 2004

1998
Simulated Annealing Approach to Crosstalk Minimization in Gridded Channel Routing.
VLSI Design, 1998

1996
COP: a Crosstalk OPtimizer for gridded channel routing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996


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