Kyle Juretus

Proceedings of the IEEE Wireless Communications and Networking Conference, 2024

DNA: DC Nodal Analysis Attack for Analog Circuits.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Boolean Domain Attack on Corrupt and Correct Based Logic Locking Techniques.

[BibT_eX]

[DOI]

Joseph Madera

Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

PP-HDC: A Privacy-Preserving Inference Framework for Hyperdimensional Computing.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023

Hidden Costs of Analog Deobfuscation Attacks.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., November, 2023

Deep Learning Sparse Array Design Using Binary Switching Configurations.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2023

2022

Lightweight Hardware Implementation of Binary Ring-LWE PQC Accelerator.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2022

Practical Performance of Analog Attack Techniques.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2022

2021

Increased Output Corruption and Structural Attack Resilience for SAT Attack Secure Logic Locking.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Synthesis of Hidden State Transitions for Sequential Logic Locking.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

2020

Characterization of In-Cone Logic Locking Resiliency Against the SAT Attack.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Physical Layer Encryption for Wireless OFDM Communication Systems.

[BibT_eX]

[DOI]

J. Hardw. Syst. Secur., 2020

Security Vulnerabilities of Obfuscated Analog Circuits.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Reducing Logic Locking Key Leakage through the Scan Chain.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

Securing Wireless Communication via Hardware-Based Packet Obfuscation.

[BibT_eX]

[DOI]

J. Hardw. Syst. Secur., 2019

Increasing the SAT Attack Resiliency of In-Cone Logic Locking.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Securing Analog Mixed-Signal Integrated Circuits Through Shared Dependencies.

[BibT_eX]

[DOI]

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

2018

Time Domain Sequential Locking for Increased Security.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Machine Learning on the Thermal Side-Channel: Analysis of Accelerator-Rich Architectures.

[BibT_eX]

[DOI]

Proceedings of the 36th IEEE International Conference on Computer Design, 2018

Importance of Multi-parameter SAT Attack Exploration for Integrated Circuit Security.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

2017

Physical gate based preamble obfuscation for securing wireless communication.

[BibT_eX]

[DOI]

Proceedings of the 2017 International Conference on Computing, 2017

2016

Reducing logic encryption overhead through gate level key insertion.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Reduced Overhead Gate Level Logic Encryption.

[BibT_eX]

[DOI]