Kyeongrok Jo
Orcid: 0000-0002-2270-5007
According to our database1,
Kyeongrok Jo
authored at least 5 papers
between 2018 and 2023.
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Bibliography
2023
Synthesis and Utilization of Standard Cells Amenable to Gear Ratio of Gate-Metal Pitches for Improving Pin Accessibility.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2021
Optimal Transistor Placement Combined with Global In-cell Routing in Standard Cell Layout Synthesis.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
2019
Design Rule Evaluation Framework Using Automatic Cell Layout Generator for Design Technology Co-Optimization.
IEEE Trans. Very Large Scale Integr. Syst., 2019
2018
Cohesive techniques for cell layout optimization supporting 2D metal-1 routing completion.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018