Kwangseok Han
According to our database1,
Kwangseok Han
authored at least 9 papers
between 2005 and 2017.
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Bibliography
2017
A 28-Gb/s Receiver With Self-contained Adaptive Equalization and Sampling Point Control Using Stochastic Sigma-Tracking Eye-Opening Monitor.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
A 103.125-Gb/s Reverse Gearbox IC in 40-nm CMOS for Supporting Legacy 10- and 40-GbE Links.
IEEE J. Solid State Circuits, 2017
2016
A Power-and-Area Efficient 10 × 10 Gb/s Bootstrap Transceiver in 40 nm CMOS for Referenceless and Lane-Independent Operation.
IEEE J. Solid State Circuits, 2016
2015
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
IEEE J. Solid State Circuits, 2015
A 100-GbE reverse gearbox IC in 40nm CMOS for supporting legacy 10- and 40-GbE standards.
Proceedings of the Symposium on VLSI Circuits, 2015
An on-chip stochastic sigma-tracking eye-opening monitor for BER-optimal adaptive equalization.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
A power-and-area efficient 10 × 10 Gb/s bootstrap transceiver in 40 nm CMOS for reference-less and lane-independent operation.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
2005
Complete high-frequency thermal noise modeling of short-channel MOSFETs and design of 5.2-GHz low noise amplifier.
IEEE J. Solid State Circuits, 2005