Kurt Wostyn

According to our database, Kurt Wostyn authored at least 5 papers between 2023 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Extremely Scaled Perpendicular SOT-MRAM Array Integration on 300mm Wafer.

Farrukh Yasin, A. Palomino, A. Kumar, Valerio Pica, Simon Van Beek, Giacomo Talmelli, V. D. Nguyen, Stefan Cosemans, D. Crotti, Kurt Wostyn, Gouri Sankar Kar, Sebastien Couet

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

Novel Cross-Point Architecture utilizing Distributed Diode Selector for Read Margin Amplification.

Taras Ravsher, Andrea Fantini, Kruti Trivedi, Nouredine Rassoul, Harold Dekkers, Attilio Belmonte, Jan Van Houdt, Valeri Afanas'ev, Kurt Wostyn, Sebastien Couet, Gouri Sankar Kar

Proceedings of the IEEE International Memory Workshop, 2024

A novel test and analysis scheme to elucidate tail bit characteristics in STT-MRAM arrays.

W. Kim, Valerio Pica, N. Jossart, Farrukh Yasin, Kurt Wostyn, S. Couet, Sidharth Rao

Proceedings of the IEEE International Memory Workshop, 2024

2023

Spin-orbit torque MRAM for ultrafast cache and neuromorphic computing applications.

Siddharth Rao, Kaiming Cai, Giacomo Talmelli, Nathali Franchina-Vergel, Ward Janssens, Hubert Hody, Farrukh Yasin, Kurt Wostyn, Sebastien Couet

Proceedings of the IEEE International Memory Workshop, 2023

NPN Si/SiGe memory selector with non-linearity>10⁵ and ON-current>6MA/cm².

Gaspard Hiblot, Taras Ravsher, Roger Loo, Bhuvaneshwari Yengula Venkata Ramana, Nathali Franchina-Vergel, Andrea Fantini, Shamin Houshmand Sharifi, Nina Bazzazian, Kurt Wostyn, Loris Angelo Labbate, Sebastien Couet, Gouri Sankar Kar

Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023