Kunihiro Sakamoto

Orcid: 0000-0002-4598-4539

According to our database1, Kunihiro Sakamoto authored at least 7 papers between 2007 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2014
SOI CMOS Voltage Multiplier Circuits with Body Bias Control Technique for Battery-Less Wireless Sensor System.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014

2012
High-Frequency Precise Characterization of Intrinsic FinFET Channel.
IEICE Trans. Electron., 2012

A 0.7-V Opamp in Scaled Low-Standby-Power FinFET Technology.
IEICE Trans. Electron., 2012

2010
0.5V FinFET SRAM with dynamic threshold control of pass gates for salvaging malfunctioned bits.
Proceedings of the 36th European Solid-State Circuits Conference, 2010

Realization of 0.7-V analog circuits by adaptive-Vt operation of FinFET.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2008
FinFET-Based Flex-Vth SRAM Design for Drastic Standby-Leakage-Current Reduction.
IEICE Trans. Electron., 2008

2007
Flex-Pass-Gate SRAM Design for Static Noise Margin Enhancement Using FinFET-Based Technology.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007


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