Kunihiko Yamaguchi
According to our database1,
Kunihiko Yamaguchi
authored at least 10 papers
between 1989 and 2000.
Collaborative distances:
Collaborative distances:
Timeline
1990
1992
1994
1996
1998
2000
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2000
Synonym hit RAM - a 500-MHz CMOS SRAM macro with 576-bit parallel comparison and parity check functions.
IEEE J. Solid State Circuits, 2000
Power reduction techniques for a 1-Mb ECL-CMOS SRAM with an access time of 550 ps and an operating frequency of 900 MHz.
IEEE J. Solid State Circuits, 2000
1998
1996
A soft-error-immune 0.9-ns 1.15-Mb ECL-CMOS SRAM with 30-ps 120 k logic gates and on-chip test circuitry.
IEEE J. Solid State Circuits, 1996
1995
IEEE J. Solid State Circuits, April, 1995
1994
IEEE J. Solid State Circuits, November, 1994
1992
IEEE J. Solid State Circuits, April, 1992
IEEE J. Solid State Circuits, February, 1992
1989
IEEE J. Solid State Circuits, October, 1989