Kun-Cheng Wu

According to our database1, Kun-Cheng Wu authored at least 5 papers between 2004 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2015
SoC test integration platform.
Proceedings of the VLSI Design, Automation and Test, 2015

2009
Power scan: DFT for power switches in VLSI designs.
Proceedings of the 2009 IEEE International Test Conference, 2009

A Practical DFT Approach for Complex Low Power Designs.
Proceedings of the Eighteentgh Asian Test Symposium, 2009

Fault modeling and testing of retention flip-flops in low power designs.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2004
Structured ASIC, evolution or revolution?
Proceedings of the 2004 International Symposium on Physical Design, 2004


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