Krste Asanovic

According to our database, Krste Asanovic authored at least 155 papers between 1992 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

AuRORA: A Full-Stack Solution for Scalable and Virtualized Accelerator Integration.

Seah Kim, Jerry Zhao, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao

IEEE Micro, 2024

FireAxe: Partitioned FPGA-Accelerated Simulation of Large-Scale RTL Designs.

Joonho Whangbo, Edwin Lim, Chengyi Lux Zhang, Kevin Anderson, Abraham Gonzalez, Raghav Gupta, Nivedha Krishnakumar, Sagar Karandikar, Borivoje Nikolic, Yakun Sophia Shao, Krste Asanovic

Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024

Zoomie: A Software-like Debugging Tool for FPGAs.

Tianrui Wei, Kevin Laeufer, Katie Lim, Jerry Zhao, Koushik Sen, Jonathan Balkind, Krste Asanovic

Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

2023

Special Issue on Hot Chips 34.

Ron Diamant, Krste Asanovic

IEEE Micro, 2023

AuRORA: Virtualized Accelerator Orchestration for Multi-Tenant Workloads.

Seah Kim, Jerry Zhao, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

CDPU: Co-designing Compression and Decompression Processing Units for Hyperscale Systems.

Sagar Karandikar, Aniruddha N. Udipi, Junsun Choi, Joonho Whangbo, Jerry Zhao, Svilen Kanev, Edwin Lim, Jyrki Alakuijala, Vrishab Madduri, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic, Parthasarathy Ranganathan

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

Profiling Hyperscale Big Data Processing.

Abraham Gonzalez, Aasheesh Kolli, Samira Manabi Khan, Sihang Liu, Vidushi Dadu, Sagar Karandikar, Jichuan Chang, Krste Asanovic, Parthasarathy Ranganathan

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

MoCA: Memory-Centric, Adaptive Execution for Multi-Tenant Deep Neural Networks.

Seah Kim, Hasan Genc, Vadim Vadimovich Nikiforov, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

2022

An Eight-Core 1.44-GHz RISC-V Vector Processor in 16-nm FinFET.

Colin Schmidt, John Charles Wright, Zhongkai Wang, Eric Chang, Albert J. Ou, Woorham Bae, Sean Huang, Vladimir M. Milovanovic, Anita Flynn, Brian C. Richards, Krste Asanovic, Elad Alon, Borivoje Nikolic

IEEE J. Solid State Circuits, 2022

Verifying RISC-V Physical Memory Protection.

Kevin Cheang, Cameron Rasmussen, Dayeol Lee, David W. Kohlbrenner, Krste Asanovic, Sanjit A. Seshia

CoRR, 2022

Hammer: a modular and reusable physical design flow tool: invited.

Harrison Liew, Daniel Grubb, John Wright, Colin Schmidt, Nayiri Krzysztofowicz, Adam M. Izraelevitz, Edward Wang, Krste Asanovic, Jonathan Bachrach, Borivoje Nikolic

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Cerberus: A Formal Approach to Secure and Efficient Enclave Memory Sharing.

Dayeol Lee, Kevin Cheang, Alexander Thomas, Catherine Lu, Pranav Gaddamadugu, Anjo Vahldiek-Oberwagner, Mona Vij, Dawn Song, Sanjit A. Seshia, Krste Asanovic

Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security, 2022

2021

Accelerating Genomic Data Analytics With Composable Hardware Acceleration Framework.

Tae Jun Ham, Yejin Lee, Seong Hoon Seo, U. Gyeong Song, Jae W. Lee, David Bruns-Smith, Brendan Sweeney, Krste Asanovic, Young H. Oh, Lisa Wu Wills

IEEE Micro, 2021

Accessible, FPGA Resource-Optimized Simulation of Multiclock Systems in FireSim.

David Biancolin, Albert Magyar, Sagar Karandikar, Alon Amid, Borivoje Nikolic, Jonathan Bachrach, Krste Asanovic

IEEE Micro, 2021

A Hardware Accelerator for Protocol Buffers.

Sagar Karandikar, Chris Leary, Chris Kennelly, Jerry Zhao, Dinesh Parimi, Borivoje Nikolic, Krste Asanovic, Parthasarathy Ranganathan

Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

4.3 An Eight-Core 1.44GHz RISC-V Vector Machine in 16nm FinFET.

Colin Schmidt, John Charles Wright, Zhongkai Wang, Eric Chang, Albert J. Ou, Woo-Rham Bae, Sean Huang, Anita Flynn, Brian C. Richards, Krste Asanovic, Elad Alon, Borivoje Nikolic

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

COBRA: A Framework for Evaluating Compositions of Hardware Branch Predictors.

Jerry Zhao, Abraham Gonzalez, Alon Amid, Sagar Karandikar, Krste Asanovic

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021

Vertically Integrated Computing Labs Using Open-Source Hardware Generators and Cloud-Hosted FPGAs.

Alon Amid, Albert J. Ou, Krste Asanovic, Yakun Sophia Shao, Borivoje Nikolic

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A 16mm² 106.1 GOPS/W Heterogeneous RISC-V Multi-Core Multi-Accelerator SoC in Low-Power 22nm FinFET.

Abraham Gonzalez, Jerry Zhao, Ben Korpan, Hasan Genc, Colin Schmidt, John Charles Wright, Ayan Biswas, Alon Amid, Farhana Sheikh, Anton Sorokin, Sirisha Kale, Mani Yalamanchi, Ramya Yarlagadda, Mark Flannigan, Larry Abramowitz, Elad Alon, Yakun Sophia Shao, Krste Asanovic, Borivoje Nikolic

Proceedings of the 47th ESSCIRC 2021, 2021

Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration.

Hasan Genc, Seah Kim, Alon Amid, Ameer Haj-Ali, Vighnesh Iyer, Pranav Prakash, Jerry Zhao, Daniel Grubb, Harrison Liew, Howard Mao, Albert J. Ou, Colin Schmidt, Samuel Steffl, John Charles Wright, Ion Stoica, Jonathan Ragan-Kelley, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020

A Dual-Core RISC-V Vector Processor With On-Chip Fine-Grain Power Management in 28-nm FD-SOI.

John Charles Wright, Colin Schmidt, Ben Keller, Daniel Palmer Dabbelt, Jaehwa Kwak, Vighnesh Iyer, Nandish Mehta, Pi-Feng Chiu, Stevo Bailey, Krste Asanovic, Borivoje Nikolic

IEEE Trans. Very Large Scale Integr. Syst., 2020

Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs.

Alon Amid, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Yakun Sophia Shao, Krste Asanovic, Borivoje Nikolic

IEEE Micro, 2020

Building Open Trusted Execution Environments.

David Kohlbrenner, Shweta Shinde, Dayeol Lee, Krste Asanovic, Dawn Song

IEEE Secur. Priv., 2020

ProTuner: Tuning Programs with Monte Carlo Tree Search.

Ameer Haj-Ali, Hasan Genc, Qijing Huang, William S. Moses, John Wawrzynek, Krste Asanovic, Ion Stoica

CoRR, 2020

RLDRM: Closed Loop Dynamic Cache Allocation with Deep Reinforcement Learning for Network Function Virtualization.

Bin Li, Yipeng Wang, Ren Wang, Charlie Tai, Ravi R. Iyer, Zhu Zhou, Andrew Herdrich, Tong Zhang, Ameer Haj-Ali, Ion Stoica, Krste Asanovic

Proceedings of the 6th IEEE Conference on Network Softwarization, 2020

AutoPhase: Juggling HLS Phase Orderings in Random Forests with Deep Reinforcement Learning.

Ameer Haj-Ali, Qijing (Jenny) Huang, William S. Moses, John Xiang, Krste Asanovic, John Wawrzynek, Ion Stoica

Proceedings of the Third Conference on Machine Learning and Systems, 2020

Genesis: A Hardware Acceleration Framework for Genomic Data Analysis.

Tae Jun Ham, David Bruns-Smith, Brendan Sweeney, Yejin Lee, Seong Hoon Seo, U. Gyeong Song, Young H. Oh, Krste Asanovic, Jae W. Lee, Lisa Wu Wills

Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

Keystone: an open framework for architecting trusted execution environments.

Dayeol Lee, David Kohlbrenner, Shweta Shinde, Krste Asanovic, Dawn Song

Proceedings of the EuroSys '20: Fifteenth EuroSys Conference 2020, 2020

Invited: Chipyard - An Integrated SoC Research and Implementation Environment.

Alon Amid, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Jonathan Bachrach, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

An Energy-Efficient RISC-V RV32IMAC Microcontroller for Periodical-Driven Sensing Applications.

Ckristian Duran, Megan Wachs, Luis E. Rueda G., Albert Huntington, Javier Ardila, Jack Kang, Andres Amaya, Héctor Gómez, Juan Romero, Laude Fernandez, Felipe Flechas, Rolando Torres, Juan Sebastian Moya, Wilmer Ramirez, Julian Arenas, Juan Gomez, Hanssel Morales, Camilo Rojas, Alex Mantilla, Elkim Roa, Krste Asanovic

Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

NeuroVectorizer: end-to-end vectorization with deep reinforcement learning.

Ameer Haj-Ali, Nesreen K. Ahmed, Theodore L. Willke, Yakun Sophia Shao, Krste Asanovic, Ion Stoica

Proceedings of the CGO '20: 18th ACM/IEEE International Symposium on Code Generation and Optimization, 2020

FirePerf: FPGA-Accelerated Full-System Hardware/Software Performance Profiling and Co-Design.

Sagar Karandikar, Albert J. Ou, Alon Amid, Howard Mao, Randy H. Katz, Borivoje Nikolic, Krste Asanovic

Proceedings of the ASPLOS '20: Architectural Support for Programming Languages and Operating Systems, 2020

2019

A Hardware Accelerator for Tracing Garbage Collection.

Martin Maas, Krste Asanovic, John Kubiatowicz

IEEE Micro, 2019

FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud.

Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy Howard Katz, Jonathan Bachrach, Krste Asanovic

IEEE Micro, 2019

BROOM: An Open-Source Out-of-Order Processor With Resilient Low-Voltage Operation in 28-nm CMOS.

Christopher Celio, Pi-Feng Chiu, Krste Asanovic, Borivoje Nikolic, David A. Patterson

IEEE Micro, 2019

Co-design of deep neural nets and neural net accelerators for embedded vision applications.

Alon Amid, Kiseok Kwon, Amir Gholami, Bichen Wu, Krste Asanovic, Kurt Keutzer

IBM J. Res. Dev., 2019

Sanctorum: A lightweight security monitor for secure enclaves.

Ilia A. Lebedev, Kyle Hogan, Jules Drean, David Kohlbrenner, Dayeol Lee, Krste Asanovic, Dawn Song, Srinivas Devadas

IACR Cryptol. ePrint Arch., 2019

Gemmini: An Agile Systolic Array Generator Enabling Systematic Evaluations of Deep-Learning Architectures.

Hasan Genc, Ameer Haj-Ali, Vighnesh Iyer, Alon Amid, Howard Mao, John Charles Wright, Colin Schmidt, Jerry Zhao, Albert J. Ou, Max Banister, Yakun Sophia Shao, Borivoje Nikolic, Ion Stoica, Krste Asanovic

CoRR, 2019

Deep Reinforcement Learning in System Optimization.

Ameer Haj-Ali, Nesreen K. Ahmed, Theodore L. Willke, Joseph Gonzalez, Krste Asanovic, Ion Stoica

CoRR, 2019

Keystone: A Framework for Architecting TEEs.

Dayeol Lee, David Kohlbrenner, Shweta Shinde, Dawn Song, Krste Asanovic

CoRR, 2019

AutoPhase: Compiler Phase-Ordering for High Level Synthesis with Deep Reinforcement Learning.

Ameer Haj Ali, Qijing Huang, William S. Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek

CoRR, 2019

Simmani: Runtime Power Modeling for Arbitrary RTL with Automatic Signal Selection.

Donggyu Kim, Jerry Zhao, Jonathan Bachrach, Krste Asanovic

Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

Golden Gate: Bridging The Resource-Efficiency Gap Between ASICs and FPGA Prototypes.

Albert Magyar, David Biancolin, John Koenig, Sanjit Seshia, Jonathan Bachrach, Krste Asanovic

Proceedings of the International Conference on Computer-Aided Design, 2019

Centrifuge: Evaluating full-system HLS-generated heterogenous-accelerator SoCs using FPGA-Acceleration.

Qijing Huang, Christopher Yarp, Sagar Karandikar, Nathan Pemberton, Benjamin Brock, Liang Ma, Guohao Dai, Robert Quitt, Krste Asanovic, John Wawrzynek

Proceedings of the International Conference on Computer-Aided Design, 2019

FPGA Accelerated INDEL Realignment in the Cloud.

Lisa Wu, David Bruns-Smith, Frank A. Nothaft, Qijing Huang, Sagar Karandikar, Johnny Le, Andrew Lin, Howard Mao, Brendan Sweeney, Krste Asanovic, David A. Patterson, Anthony D. Joseph

Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019

FASED: FPGA-Accelerated Simulation and Evaluation of DRAM.

David Biancolin, Sagar Karandikar, Donggyu Kim, Jack Koenig, Andrew Waterman, Jonathan Bachrach, Krste Asanovic

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

AutoPhase: Compiler Phase-Ordering for HLS with Deep Reinforcement Learning.

Qijing Huang, Ameer Haj-Ali, William S. Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek

Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

Open-Source EDA Tools and IP, A View from the Trenches.

Elad Alon, Krste Asanovic, Jonathan Bachrach, Borivoje Nikolic

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

An Out-of-Order RISC-V Processor with Resilient Low-Voltage Operation in 28NM CMOS.

Pi-Feng Chiu, Christopher Celio, Krste Asanovic, David A. Patterson, Borivoje Nikolic

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

DESSERT: Debugging RTL Effectively with State Snapshotting for Error Replays across Trillions of Cycles.

Donggyu Kim, Christopher Celio, Sagar Karandikar, David Biancolin, Jonathan Bachrach, Krste Asanovic

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

Generating the Next Wave of Custom Silicon.

Borivoje Nikolic, Elad Alon, Krste Asanovic

Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018

2017

Reprogrammable Redundancy for SRAM-Based Cache V_min Reduction in a 28-nm RISC-V Processor.

Brian Zimmer, Pi-Feng Chiu, Borivoje Nikolic, Krste Asanovic

IEEE J. Solid State Circuits, 2017

A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI.

Ben Keller, Martin Cochet, Brian Zimmer, Jaehwa Kwak, Alberto Puggelli, Yunsup Lee, Milovan Blagojevic, Stevo Bailey, Pi-Feng Chiu, Daniel Palmer Dabbelt, Colin Schmidt, Elad Alon, Krste Asanovic, Borivoje Nikolic

IEEE J. Solid State Circuits, 2017

Distributed-Memory Breadth-First Search on Massive Graphs.

Aydin Buluç, Scott Beamer, Kamesh Madduri, Krste Asanovic, David A. Patterson

CoRR, 2017

Microprocessor chip with photonic I/O.

Chen Sun, Mark T. Wade, Yunsup Lee, Jason S. Orcutt, Luca Alloatti, Michael S. Georgas, Andrew S. Waterman, Jeffrey M. Shainline, Rimas R. Avizienis, Sen Lin, Benjamin R. Moss, Rajesh Kumar, Fabio Pavanello, Amir H. Atabaki, Henry M. Cook, Albert J. Ou, Jonathan C. Leu, Yu-Hsin Chen, Krste Asanovic, Rajeev J. Ram, Milos A. Popovic, Vladimir Marko Stojanovic

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2017

Reducing Pagerank Communication via Propagation Blocking.

Scott Beamer, Krste Asanovic, David A. Patterson

Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium, 2017

Cyclist: Accelerating hardware development.

Jonathan Bachrach, Albert Magyar, Daniel Palmer Dabbelt, Patrick Li, Richard Lin, Krste Asanovic

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Return of the Runtimes: Rethinking the Language Runtime System for the Cloud 3.0 Era.

Martin Maas, Krste Asanovic, John Kubiatowicz

Proceedings of the 16th Workshop on Hot Topics in Operating Systems, 2017

A Hardware Accelerator for Computing an Exact Dot Product.

Jack Koenig, David Biancolin, Jonathan Bachrach, Krste Asanovic

Proceedings of the 24th IEEE Symposium on Computer Arithmetic, 2017

2016

An Agile Approach to Building RISC-V Microprocessors.

Yunsup Lee, Andrew Waterman, Henry Cook, Brian Zimmer, Ben Keller, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Rimas Avizienis, Brian C. Richards, Jonathan Bachrach, David A. Patterson, Elad Alon, Bora Nikolic, Krste Asanovic

IEEE Micro, 2016

A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI.

Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Steven Bailey, Milovan Blagojevic, Pi-Feng Chiu, Hanh-Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian C. Richards, Philippe Flatresse, Elad Alon, Krste Asanovic, Borivoje Nikolic

IEEE J. Solid State Circuits, 2016

The Renewed Case for the Reduced Instruction Set Computer: Avoiding ISA Bloat with Macro-Op Fusion for RISC-V.

Christopher Celio, Daniel Palmer Dabbelt, David A. Patterson, Krste Asanovic

CoRR, 2016

Strober: Fast and Accurate Sample-Based Energy Simulation for Arbitrary RTL.

Donggyu Kim, Adam M. Izraelevitz, Christopher Celio, Hokeun Kim, Brian Zimmer, Yunsup Lee, Jonathan Bachrach, Krste Asanovic

Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016

Vector Processors for Energy-Efficient Embedded Systems.

Daniel Palmer Dabbelt, Colin Schmidt, Eric Love, Howard Mao, Sagar Karandikar, Krste Asanovic

Proceedings of the Fourth ACM International Workshop on Many-core Embedded Systems, 2016

Sub-microsecond adaptive voltage scaling in a 28nm FD-SOI processor SoC.

Ben Keller, Martin Cochet, Brian Zimmer, Yunsup Lee, Milovan Blagojevic, Jaehwa Kwak, Alberto Puggelli, Stevo Bailey, Pi-Feng Chiu, Daniel Palmer Dabbelt, Colin Schmidt, Elad Alon, Krste Asanovic, Borivoje Nikolic

Proceedings of the ESSCIRC Conference 2016: 42^nd European Solid-State Circuits Conference, 2016

Reprogrammable redundancy for cache Vmin reduction in a 28nm RISC-V processor.

Brian Zimmer, Pi-Feng Chiu, Borivoje Nikolic, Krste Asanovic

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

Taurus: A Holistic Language Runtime System for Coordinating Distributed Managed-Language Applications.

Martin Maas, Krste Asanovic, Tim Harris, John Kubiatowicz

Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems, 2016

2015

Per-Core DVFS With Switched-Capacitor Converters for Energy Efficiency in Manycore Processors.

Ruzica Jevtic, Hanh-Phuc Le, Milovan Blagojevic, Stevo Bailey, Krste Asanovic, Elad Alon, Borivoje Nikolic

IEEE Trans. Very Large Scale Integr. Syst., 2015

Single-chip microprocessor that communicates directly using light.

Chen Sun, Mark T. Wade, Yunsup Lee, Jason S. Orcutt, Luca Alloatti, Michael Georgas, Andrew Waterman, Jeffrey M. Shainline, Rimas Avizienis, Sen Lin, Benjamin Moss, Rajesh Kumar, Fabio Pavanello, Amir H. Atabaki, Henry Cook, Albert J. Ou, Jonathan C. Leu, Yu-Hsin Chen, Krste Asanovic, Rajeev J. Ram, Milos A. Popovic, Vladimir Marko Stojanovic

Nat., 2015

The GAP Benchmark Suite.

Scott Beamer, Krste Asanovic, David A. Patterson

CoRR, 2015

A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI.

Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Hanh-Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian C. Richards, Philippe Flatresse, Elad Alon, Krste Asanovic, Borivoje Nikolic

Proceedings of the Symposium on VLSI Circuits, 2015

GAIL: the graph algorithm iron law.

Scott Beamer, Krste Asanovic, David A. Patterson

Proceedings of the 5th Workshop on Irregular Applications - Architectures and Algorithms, 2015

Locality Exists in Graph Processing: Workload Characterization on an Ivy Bridge Server.

Scott Beamer, Krste Asanovic, David A. Patterson

Proceedings of the 2015 IEEE International Symposium on Workload Characterization, 2015

Trash Day: Coordinating Garbage Collection in Distributed Systems.

Martin Maas, Tim Harris, Krste Asanovic, John Kubiatowicz

Proceedings of the 15th Workshop on Hot Topics in Operating Systems, 2015

Raven: A 28nm RISC-V vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking.

Yunsup Lee, Brian Zimmer, Andrew Waterman, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Henry Cook, Rimas Avizienis, Brian C. Richards, Elad Alon, Borivoje Nikolic, Krste Asanovic

Proceedings of the 2015 IEEE Hot Chips 27 Symposium (HCS), 2015

DIABLO: A Warehouse-Scale Computer Network Simulator using FPGAs.

Zhangxi Tan, Zhenghao Qian, Xi Chen, Krste Asanovic, David A. Patterson

Proceedings of the Twentieth International Conference on Architectural Support for Programming Languages and Operating Systems, 2015

2014

Exploring the Design Space of SPMD Divergence Management on Data-Parallel Architectures.

Yunsup Lee, Vinod Grover, Ronny Krashinsky, Mark Stephenson, Stephen W. Keckler, Krste Asanovic

Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014

Author retrospective for optimizing matrix multiply using PHiPAC: a portable high-performance ANSI C coding methodology.

Jeff A. Bilmes, Krste Asanovic, Chee-Whye Chin, Jim Demmel

Proceedings of the ACM International Conference on Supercomputing 25th Anniversary Volume, 2014

Joint impact of random variations and RTN on dynamic writeability in 28nm bulk and FDSOI SRAM.

Brian Zimmer, Olivier Thomas, Seng Oon Toh, Taylor Vincent, Krste Asanovic, Borivoje Nikolic

Proceedings of the 44th European Solid State Device Research Conference, 2014

A 45nm 1.3GHz 16.7 double-precision GFLOPS/W RISC-V processor with vector accelerators.

Yunsup Lee, Andrew Waterman, Rimas Avizienis, Henry Cook, Chen Sun, Vladimir Stojanovic, Krste Asanovic

Proceedings of the ESSCIRC 2014, 2014

2013

Exploring the Tradeoffs between Programmability and Efficiency in Data-Parallel Accelerators.

Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, Krste Asanovic

ACM Trans. Comput. Syst., 2013

Direction-optimizing breadth-first search.

Scott Beamer, Krste Asanovic, David A. Patterson

Sci. Program., 2013

A hardware evaluation of cache partitioning to improve utilization and energy-efficiency while preserving responsiveness.

Henry Cook, Miquel Moretó, Sarah Bird, Khanh Dao, David A. Patterson, Krste Asanovic

Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013

Distributed Memory Breadth-First Search Revisited: Enabling Bottom-Up Search.

Scott Beamer, Aydin Buluç, Krste Asanovic, David A. Patterson

Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

The RISC-V instruction set.

Andrew Waterman, Yunsup Lee, Rimas Avizienis, Henry Cook, David A. Patterson, Krste Asanovic

Proceedings of the 2013 IEEE Hot Chips 25 Symposium (HCS), 2013

Measuring the gap between programmable and fixed-function accelerators: A case study on speech recognition.

Yunsup Lee, David Sheffield, Andrew Waterman, Michael J. Anderson, Kurt Keutzer, Krste Asanovic

Proceedings of the 2013 IEEE Hot Chips 25 Symposium (HCS), 2013

Welcome from general chairs.

Krste Asanovic, Jan-Willem van de Waerdt

Proceedings of the 2013 IEEE Hot Chips 25 Symposium (HCS), 2013

Tessellation: refactoring the OS around explicit resource containers with continuous adaptation.

Juan A. Colmenares, Gage Eads, Steven A. Hofmeyr, Sarah Bird, Miquel Moretó, David Chou, Brian Gluzman, Eric Roman, Davide B. Bartolini, Nitesh Mor, Krste Asanovic, John Kubiatowicz

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Convergence and scalarization for data-parallel architectures.

Yunsup Lee, Ronny Krashinsky, Vinod Grover, Stephen W. Keckler, Krste Asanovic

Proceedings of the 2013 IEEE/ACM International Symposium on Code Generation and Optimization, 2013

PHANTOM: practical oblivious computation in a secure processor.

Martin Maas, Eric Love, Emil Stefanov, Mohit Tiwari, Elaine Shi, Krste Asanovic, John Kubiatowicz, Dawn Song

Proceedings of the 2013 ACM SIGSAC Conference on Computer and Communications Security, 2013

2012

SRAM Assist Techniques for Operation in a Wide Voltage Range in 28-nm CMOS.

Brian Zimmer, Seng Oon Toh, Huy Vo, Yunsup Lee, Olivier Thomas, Krste Asanovic, Borivoje Nikolic

IEEE Trans. Circuits Syst. II Express Briefs, 2012

Globally Synchronized Frames for guaranteed quality-of-service in on-chip networks.

Jae W. Lee, Man Cheuk Ng, Krste Asanovic

J. Parallel Distributed Comput., 2012

Designing Chip-Level Nanophotonic Interconnection Networks.

Christopher Batten, Ajay Joshi, Vladimir Stojanovic, Krste Asanovic

IEEE J. Emerg. Sel. Topics Circuits Syst., 2012

Context-centric Security.

Mohit Tiwari, Prashanth Mohan, Andrew Osheroff, Hilfi Alkaff, Elaine Shi, Eric Love, Dawn Song, Krste Asanovic

Proceedings of the 7th USENIX Workshop on Hot Topics in Security, 2012

GPUs as an opportunity for offloading garbage collection.

Martin Maas, Philip Reames, Jeffrey Morlan, Krste Asanovic, Anthony D. Joseph, John Kubiatowicz

Proceedings of the International Symposium on Memory Management, 2012

Chisel: constructing hardware in a Scala embedded language.

Jonathan Bachrach, Huy Vo, Brian C. Richards, Yunsup Lee, Andrew Waterman, Rimas Avizienis, John Wawrzynek, Krste Asanovic

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011

Real-time Musical Applications on an Experimental Operating System for Multi-Core Processors.

Juan A. Colmenares, Ian Saxton, Eric Battenberg, Rimas Avizienis, Nils Peters, Krste Asanovic, John Kubiatowicz, David Wessel

Proceedings of the 2011 International Computer Music Conference, 2011

The Maven vector-thread architecture.

Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, Krste Asanovic

Proceedings of the 2011 IEEE Hot Chips 23 Symposium (HCS), 2011

Tessellation operating system: Building a real-time, responsive, high-throughput client OS for many-core architectures.

Juan A. Colmenares, Sarah Bird, Gage Eads, Steven A. Hofmeyr, Albert Kim, Rohit Poddar, Hilfi Alkaff, Krste Asanovic, John Kubiatowicz

Proceedings of the 2011 IEEE Hot Chips 23 Symposium (HCS), 2011

2010

Guest Editors' Introduction: Hot Chips 21.

Krste Asanovic, Ralph Wittig

IEEE Micro, 2010

Composing parallel software efficiently with lithe.

Heidi Pan, Benjamin Hindman, Krste Asanovic

Proceedings of the 2010 ACM SIGPLAN Conference on Programming Language Design and Implementation, 2010

A case for FAME: FPGA architecture model execution.

Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bird, Krste Asanovic, David A. Patterson

Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010

Re-architecting DRAM memory systems with monolithically integrated silicon photonics.

Scott Beamer, Chen Sun, Yong-Jin Kwon, Ajay Joshi, Christopher Batten, Vladimir Stojanovic, Krste Asanovic

Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010

RAMP gold: an FPGA-based architecture simulator for multiprocessors.

Zhangxi Tan, Andrew Waterman, Rimas Avizienis, Yunsup Lee, Henry Cook, David A. Patterson, Krste Asanovic

Proceedings of the 47th Design Automation Conference, 2010

2009

Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics.

Christopher Batten, Ajay Joshi, Jason Orcutt, Anatol Khilo, Benjamin Moss, Charles Holzwarth, Milos A. Popovic, Hanqing Li, Henry I. Smith, Judy L. Hoyt, Franz X. Kärtner, Rajeev J. Ram, Vladimir Stojanovic, Krste Asanovic

IEEE Micro, 2009

A view of the parallel computing landscape.

Krste Asanovic, Rastislav Bodík, James Demmel, Tony M. Keaveny, Kurt Keutzer, John Kubiatowicz, Nelson Morgan, David A. Patterson, Koushik Sen, John Wawrzynek, David Wessel, Katherine A. Yelick

Commun. ACM, 2009

Silicon-photonic clos networks for global on-chip communication.

Ajay Joshi, Christopher Batten, Yong-Jin Kwon, Scott Beamer, Imran Shamim, Krste Asanovic, Vladimir Stojanovic

Proceedings of the Third International Symposium on Networks-on-Chips, 2009

Designing multi-socket systems using silicon photonics.

Scott Beamer, Krste Asanovic, Christopher Batten, Ajay Joshi, Vladimir Stojanovic

Proceedings of the 23rd international conference on Supercomputing, 2009

2008

Implementing the scale vector-thread processor.

Ronny Krashinsky, Christopher Batten, Krste Asanovic

ACM Trans. Design Autom. Electr. Syst., 2008

MEMOCODE 2008 Co-Design Contest.

Patrick Schaumont, Krste Asanovic, James C. Hoe

Proceedings of the 6th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2008), 2008

Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics.

Christopher Batten, Ajay Joshi, Jason Orcutt, Anatoly Khilo, Benjamin Moss, Charles Holzwarth, Milos A. Popovic, Hanqing Li, Henry I. Smith, Judy L. Hoyt, Franz X. Kärtner, Rajeev J. Ram, Vladimir Stojanovic, Krste Asanovic

Proceedings of the 16th Annual IEEE Symposium on High Performance Interconnects (HOTI 2008), 2008

Compiling for vector-thread architectures.

Mark Hampton, Krste Asanovic

Proceedings of the Sixth International Symposium on Code Generation and Optimization (CGO 2008), 2008

2007

Activity-Sensitive Flip-Flop and Latch Selection for Reduced Energy.

Seongmoo Heo, Ronny Krashinsky, Krste Asanovic

IEEE Trans. Very Large Scale Integr. Syst., 2007

RAMP: Research Accelerator for Multiple Processors.

John Wawrzynek, David A. Patterson, Mark Oskin, Shih-Lien Lu, Christoforos E. Kozyrakis, James C. Hoe, Derek Chiou, Krste Asanovic

IEEE Micro, 2007

Continual hashing for efficient fine-grain state inconsistency detection.

Jae W. Lee, Myron King, Krste Asanovic

Proceedings of the 25th International Conference on Computer Design, 2007

Transactors for parallel hardware and software co-design.

Krste Asanovic

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2007

2006

Energy-aware lossless data compression.

Kenneth C. Barr, Krste Asanovic

ACM Trans. Comput. Syst., 2006

Unbounded Transactional Memory.

C. Scott Ananian, Krste Asanovic, Bradley C. Kuszmaul, Charles E. Leiserson, Sean Lie

IEEE Micro, 2006

Rethinking Hardware Support for Network Analysis and Intrusion Prevention.

Vern Paxson, Krste Asanovic, Sarang Dharmapurikar, John W. Lockwood, Ruoming Pang, Robin Sommer, Nicholas Weaver

Proceedings of the 1st USENIX Workshop on Hot Topics in Security, 2006

METERG: Measurement-Based End-to-End Performance Estimation Technique in QoS-Capable Multiprocessors.

Jae W. Lee, Krste Asanovic

Proceedings of the 12th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2006), 2006

Accelerating architectural exploration using canonical instruction segments.

Rose F. Liu, Krste Asanovic

Proceedings of the 2006 IEEE International Symposium on Performance Analysis of Systems and Software, 2006

Branch trace compression for snapshot-based simulation.

Kenneth C. Barr, Krste Asanovic

Proceedings of the 2006 IEEE International Symposium on Performance Analysis of Systems and Software, 2006

Implementing virtual memory in a vector processor with software restart markers.

Mark Hampton, Krste Asanovic

Proceedings of the 20th Annual International Conference on Supercomputing, 2006

Research accelerator for multiple processors.

David A. Patterson, Arvind, Krste Asanovic, Derek Chiou, James C. Hoe, Christos Kozyrakis, Shih-Lien Lu, Mark Oskin, Jan M. Rabaey, John Wawrzynek

Proceedings of the 2006 IEEE Hot Chips 18 Symposium (HCS), 2006

2005

A Speculative Control Scheme for an Energy-Efficient Banked Register Fil.

Jessica H. Tseng, Krste Asanovic

IEEE Trans. Computers, 2005

Controlling program execution through binary instrumentation.

Heidi Pan, Krste Asanovic, Robert Cohn, Chi-Keung Luk

SIGARCH Comput. Archit. News, 2005

Mondrix: memory isolation for linux using mondriaan memory protection.

Emmett Witchel, Junghwan Rhee, Krste Asanovic

Proceedings of the 20th ACM Symposium on Operating Systems Principles 2005, 2005

Accelerating Multiprocessor Simulation with a Memory Timestamp Record.

Kenneth C. Barr, Heidi Pan, Michael Zhang, Krste Asanovic

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2005

Replacing global wires with an on-chip network: a power analysis.

Seongmoo Heo, Krste Asanovic

Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005

Victim Replication: Maximizing Capacity while Hiding Wire Delay in Tiled Chip Multiprocessors.

Michael Zhang, Krste Asanovic

Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005

2004

The Vector-Thread Architecture.

Ronny Krashinsky, Christopher Batten, Mark Hampton, Steve Gerding, Brian Pharris, Jared Casper, Krste Asanovic

IEEE Micro, 2004

Cache Refill/Access Decoupling for Vector Machines.

Christopher Batten, Ronny Krashinsky, Steve Gerding, Krste Asanovic

Proceedings of the 37th Annual International Symposium on Microarchitecture (MICRO-37 2004), 2004

Power-optimal pipelining in deep submicron technology.

Seongmoo Heo, Krste Asanovic

Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

2003

Reducing power density through activity migration.

Seongmoo Heo, Kenneth C. Barr, Krste Asanovic

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

Banked Multiported Register Files for High-Frequency Superscalar Microprocessors.

Jessica H. Tseng, Krste Asanovic

Proceedings of the 30th International Symposium on Computer Architecture (ISCA 2003), 2003

Hardware Works, Software Doesn't: Enforcing Modularity with Mondriaan Memory Protection.

Emmett Witchel, Krste Asanovic

Proceedings of HotOS'03: 9th Workshop on Hot Topics in Operating Systems, 2003

2002

Fine-grain CAM-tag cache resizing using miss tags.

Michael Zhang, Krste Asanovic

Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002

Dynamic Fine-Grain Leakage Reduction Using Leakage-Biased Bitlines.

Seongmoo Heo, Kenneth C. Barr, Mark Hampton, Krste Asanovic

Proceedings of the 29th International Symposium on Computer Architecture (ISCA 2002), 2002

Mondrian memory protection.

Emmett Witchel, Josh Cates, Krste Asanovic

Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), 2002

2001

Multithreading decoupled architectures for complexity-effective general purpose computing.

Michael Sung, Ronny Krashinsky, Krste Asanovic

SIGARCH Comput. Archit. News, 2001

Direct addressed caches for reduced power consumption.

Emmett Witchel, Samuel Larsen, C. Scott Ananian, Krste Asanovic

Proceedings of the 34th Annual International Symposium on Microarchitecture, 2001

Heads and tails: a variable-length instruction format supporting parallel fetch and decode.

Heidi Pan, Krste Asanovic

Proceedings of the 2001 International Conference on Compilers, 2001

2000

Energy-Efficient Register Access.

Jessica H. Tseng, Krste Asanovic

Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000

Dynamic zero compression for cache energy reduction.

Luis Villa, Michael Zhang, Krste Asanovic

Proceedings of the 33rd Annual IEEE/ACM International Symposium on Microarchitecture, 2000

1997

Scalable Processors in the Billion-Transistor Era: IRAM.

Christoforos E. Kozyrakis, Stylianos Perissakis, David A. Patterson, Thomas E. Anderson, Krste Asanovic, Neal Cardwell, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Randi Thomas, Noah Treuhaft, Katherine A. Yelick

Computer, 1997

A Fast Kohonen Net Implementation for Spert-II.

Krste Asanovic

Proceedings of the Biological and Artificial Computation: From Neuroscience to Technology, 1997

Optimizing Matrix Multiply Using PHiPAC: A Portable, High-Performance, ANSI C Coding Methodology.

Jeff A. Bilmes, Krste Asanovic, Chee-Whye Chin, James Demmel

Proceedings of the 11th international conference on Supercomputing, 1997

Intelligent RAM (IRAM): The Industrial Setting, Applications and Architectures.

David A. Patterson, Krste Asanovic, Aaron B. Brown, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Christoforos E. Kozyrakis, David R. Martin, Stylianos Perissakis, Randi Thomas, Noah Treuhaft, Katherine A. Yelick

Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

Using PHiPAC to speed error back-propagation learning.

Jeff A. Bilmes, Krste Asanovic, Chee-Whye Chin, James Demmel

Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

1996

Spert-II: A Vector Microprocessor System.

John Wawrzynek, Krste Asanovic, Brian Kingsbury, David Johnson, James Beck, Nelson Morgan

Computer, 1996

1995

SPERT-II: A Vector Microprocessor System and its Application to Large Problems in Backpropagation Training.

John Wawrzynek, Krste Asanovic, Brian Kingsbury, James Beck, David Johnson, Nelson Morgan

Proceedings of the Advances in Neural Information Processing Systems 8, 1995

1993

Using simulations of reduced precision arithmetic to design a neuro-microprocessor.

Krste Asanovic, Nelson Morgan, John Wawrzynek

J. VLSI Signal Process., 1993

The design of a neuro-microprocessor.

John Wawrzynek, Krste Asanovic, Nelson Morgan

IEEE Trans. Neural Networks, 1993

Designing A Connectionist Network Supercomputer.

Krste Asanovic, James Beck, Jerry Feldman, Nelson Morgan, John Wawrzynek

Int. J. Neural Syst., 1993

1992

SPERT: a VLIW/SIMD microprocessor for artificial neural network computations.

Krste Asanovic, James Beck, Brian Kingsbury, Phil Kohn, Nelson Morgan, John Wawrzynek

Proceedings of the Application Specific Array Processors, 1992