Krishnan Sundaresan

According to our database, Krishnan Sundaresan authored at least 15 papers between 2002 and 2008.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of six.

2008

Interconnect Signaling and Layout Optimization to Manage Thermal Effects Due to Self Heating in On-Chip Signal Buses.

Krishnan Sundaresan, Nihar R. Mahapatra

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

2007

An Analysis of Timing Violations Due to Spatially Distributed Thermal Effects in Global Wires.

Krishnan Sundaresan, Nihar R. Mahapatra

Proceedings of the 44th Design Automation Conference, 2007

2006

Fast, Performance-Optimized Partial Match Address Compression for Low-Latency On-Chip Address Buses.

Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra

Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006

Efficient encoding for address buses with temporal redundancy for simultaneous area and energy reduction.

Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra

Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

Value-based bit ordering for energy optimization of on-chip global signal buses.

Krishnan Sundaresan, Nihar R. Mahapatra

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005

A Limit Study on the Potential of Compression for Improving Memory System Performance, Power Consumption, and Cost.

Nihar R. Mahapatra, Jiangjiang Liu, Krishnan Sundaresan, Srinivas Dangeti, Balakrishna V. Venkatrao

J. Instr. Level Parallelism, 2005

An Accurate Energy and Thermal Model for Global Signal Buses.

Krishnan Sundaresan, Nihar R. Mahapatra

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Energy-Efficient Compressed Address Transmission.

Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Accurate Energy Dissipation and Thermal Modeling for Nanometer-Scale Buses.

Krishnan Sundaresan, Nihar R. Mahapatra

Proceedings of the 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 2005

2004

Dynamic Address Compression Schemes: A Performance, Energy, and Cost Study.

Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra

Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004

2003

Code Compression Techniques for Embedded Systems and Their Effectiveness.

Krishnan Sundaresan, Nihar R. Mahapatra

Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003

Hardware-Only Compression to Reduce Cost and Improve Utilization of Address Buses.

Jiangjiang Liu, Nihar R. Mahapatra, Krishnan Sundaresan

Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003

The potential of compression to improve memory system performance, power consumption, and cost.

Nihar R. Mahapatra, Jiangjiang Liu, Krishnan Sundaresan, Srinivas Dangeti, Balakrishna V. Venkatrao

Proceedings of the 22nd IEEE International Performance Computing and Communications Conference, 2003

Hardware-Only Compression of Underutilized Address Buses: Design and Performance, Power, and Cost Analysis.

Nihar R. Mahapatra, Jiangjiang Liu, Krishnan Sundaresan

Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

2002

The performance advantage of applying compression to the memory system.

Nihar R. Mahapatra, Jiangjiang Liu, Krishnan Sundaresan

Proceedings of The Workshop on Memory Systems Performance (MSP 2002), 2002