Krishnan Kailas

Orcid: 0000-0002-9935-9827

According to our database1, Krishnan Kailas authored at least 11 papers between 1998 and 2024.

Collaborative distances:

Timeline

2000
2005
2010
2015
2020
0
1
2
3
4
1
1
1
2
1
1
1
1
1
1

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Shrinking the Giant : Quasi-Weightless Transformers for Low Energy Inference.
CoRR, 2024

LogicNets vs. ULEEN : Comparing two novel high throughput edge ML inference techniques on FPGA.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

Data Motion Acceleration: Chaining Cross-Domain Multi Accelerators.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

2019
Research From the IEEE IBM AI Compute and Emerging Technology Symposia.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2019

2014
3D stacking of high-performance processors.
Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014

2009
Formal verification of correctness and performance of random priority-based arbiters.
Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, 2009

2005
Data Hiding in Compiled Program Binaries for Enhancing Computer System Performance.
Proceedings of the Information Hiding, 7th International Workshop, 2005

2003
An innovative low-power high-performance programmable signal processor for digital communications.
IBM J. Res. Dev., 2003

2002
A Register File Architecture and Compilation Scheme for Clustered ILP Processors.
Proceedings of the Euro-Par 2002, 2002

2001
CARS: A New Code Generation Framework for Clustered ILP Processors.
Proceedings of the Seventh International Symposium on High-Performance Computer Architecture (HPCA'01), 2001

1998
An eight-issue tree-VLIW processor for dynamic binary translation.
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998


  Loading...