Krishna M. Diwakar

According to our database1, Krishna M. Diwakar authored at least 6 papers between 2008 and 2009.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2009
Low Power, Low Latency, High Throughput 16-Bit CSA Adder Using Nonclocked Pass-Transistor Logic.
J. Circuits Syst. Comput., 2009

Vector quantized signal dependant Delta-Sigma modulator based high performance three-phase switching converter.
IEICE Electron. Express, 2009

Delta-Sigma Modulator based multiplier.
IEICE Electron. Express, 2009

Analog Multiplier with High Accuracy.
Proceedings of the First International Conference on Computational Intelligence, 2009

2008
Design of a low-power, high performance, 8×8 bit multiplier using a Shannon-based adder cell.
Microelectron. J., 2008

Highly stable Delta-Sigma Modulator for industrial applications.
IEICE Electron. Express, 2008


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