Krashna Nand Mishra

According to our database1, Krashna Nand Mishra authored at least 2 papers between 2019 and 2021.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of seven.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Creating Fastest Self timing Reference Path for High Speed Memory Designs.
Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

2019
Allowing Switching off Periphery Voltage Island Instead of Doing it per Instance Through Periphery VDD Collapse in SRAMs.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019


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