Kotaro Terada
According to our database1,
Kotaro Terada
authored at least 8 papers
between 2007 and 2024.
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Bibliography
2024
QUBO Formulation Using Sequence Pair With Search Space Restriction for Rectangle Packing Problem.
IEEE Access, 2024
2019
A Fully-Connected Ising Model Embedding Method and Its Evaluation for CMOS Annealing Machines.
IEICE Trans. Inf. Syst., 2019
2018
Proceedings of the 2018 International Symposium on VLSI Design, 2018
2017
A Bitwidth-Aware High-Level Synthesis Algorithm Using Operation Chainings for Tiled-DR Architectures.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017
2015
A High-Level Synthesis Algorithm with Inter-Island Distance Based Operation Chainings for RDR Architectures.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015
A floorplan-driven high-level synthesis algorithm with multiple-operation chainings based on path enumeration.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
A floorplan-driven high-level synthesis algorithm with operation chainings using chaining enumeration.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014
2007
BMC Bioinform., 2007