Kosuke Tatsumura

Orcid: 0000-0003-0511-443X

According to our database1, Kosuke Tatsumura authored at least 14 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Efficient and Scalable Architecture for Multiple-Chip Implementation of Simulated Bifurcation Machines.
IEEE Access, 2024

Ultra-High-Speed Optimization for 5G Wireless Resource Allocation by Simulated Bifurcation Machine.
Proceedings of the IEEE Wireless Communications and Networking Conference, 2024

2023
Roadmap for Unconventional Computing with Nanotechnology.
CoRR, 2023

Real-Time Trading System Based on Selections of Potentially Profitable, Uncorrelated, and Balanced Stocks by NP-Hard Combinatorial Optimization.
IEEE Access, 2023

Pairs-Trading System Using Quantum-Inspired Combinatorial Optimization Accelerator for Optimal Path Search in Market Graphs.
IEEE Access, 2023

Correlation-Diversified Portfolio Construction by Finding Maximum Independent Set in Large-Scale Market Graph.
IEEE Access, 2023

2021
Large-scale combinatorial optimization in real-time systems by FPGA-based accelerators for simulated bifurcation.
Proceedings of the HEART '21: 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2021

2020
Live Demonstration: Capturing Short-Lived Currency Arbitrage Opportunities with a Simulated Bifurcation Algorithm-Based Trading System.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Currency Arbitrage Machine Based on the Simulated Bifurcation Algorithm for Ultrafast Detection of Optimal Opportunity.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
FPGA-Based Simulated Bifurcation Machine.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

2018
Enhancing FPGAs with Magnetic Tunnel Junction-Based Block RAMs.
ACM Trans. Reconfigurable Technol. Syst., 2018

2017
Don't Forget the Memory: Automatic Block RAM Modelling, Optimization, and Architecture Exploration.
Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

2016
High density, low energy, magnetic tunnel junction based block RAMs for memory-rich FPGAs.
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

2014
A pure-CMOS nonvolatile multi-context configuration memory for dynamically reconfigurable FPGAs.
Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014


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