Kostas Pagiamtzis

Orcid: 0009-0008-4018-4752

According to our database1, Kostas Pagiamtzis authored at least 6 papers between 2003 and 2006.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2006
Content-addressable memory (CAM) circuits and architectures: a tutorial and survey.
IEEE J. Solid State Circuits, 2006

A Soft-Error Tolerant Content-Addressable Memory (CAM) Using An Error-Correcting-Match Scheme.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005
Using cache to reduce power in content-addressable memories (CAMs).
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004
A low-power content-addressable memory (CAM) using pipelined hierarchical search scheme.
IEEE J. Solid State Circuits, 2004

A Study of Multiple-Valued Magnetoresistive RAM (MRAM) Using Binary MTJ Devices.
Proceedings of the 34th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2004), 2004

2003
Pipelined match-lines and hierarchical search-lines for low-power content-addressable memories.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003


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