Konstantinos Nikas

Orcid: 0000-0003-4424-9951

According to our database1, Konstantinos Nikas authored at least 32 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Online presence:

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Bibliography

2024
Vitamin-V: Expanding Open-Source RISC-V Cloud Environments.
CoRR, 2024

FaaSRail: Employing Real Workloads to Generate Representative Load for Serverless Research.
Proceedings of the 33rd International Symposium on High-Performance Parallel and Distributed Computing, 2024

2023
Vitamin-V: Virtual Environment and Tool-boxing for Trustworthy Development of RISC-V based Cloud Services.
CoRR, 2023

FaaSCell: A Case for Intra-node Resource Management: Work-In-Progress.
Proceedings of the 1st Workshop on SErverless Systems, Applications and MEthodologies, 2023


2022
A Flexible Multi-Temporal and Multi-Modal Framework for Sentinel-1 and Sentinel-2 Analysis Ready Data.
Remote. Sens., 2022

FaaS in the age of (sub-)<i>μs</i> I/O: a performance analysis of snapshotting.
Proceedings of the SYSTOR '22: The 15th ACM International Systems and Storage Conference, Haifa, Israel, June 13, 2022

2021
RCU-HTM: A generic synchronization technique for highly efficient concurrent search trees.
Concurr. Comput. Pract. Exp., 2021

Exploiting Page Table Locality for Agile TLB Prefetching.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

2020
Enabling Virtual Memory Research on RISC-V with a Configurable TLB Hierarchy for the Rocket Chip Generator.
CoRR, 2020

CYBELE - Fostering precision agriculture & livestock farming through secure access to large-scale HPC enabled virtual industrial experimentation environments fostering scalable big data analytics.
Comput. Networks, 2020

Efficient Concurrent Range Queries in B+-trees using RCU-HTM.
Proceedings of the SPAA '20: 32nd ACM Symposium on Parallelism in Algorithms and Architectures, 2020

Enhancing and Exploiting Contiguity for Fast Memory Virtualization.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

A Configurable TLB Hierarchy for the RISC-V Architecture.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

2019
ACTiManager: An end-to-end interference-aware cloud resource manager.
Proceedings of the 20th International Middleware Conference Demos and Posters, 2019

DICER: Diligent Cache Partitioning for Efficient Workload Consolidation.
Proceedings of the 48th International Conference on Parallel Processing, 2019

2018
Efficient resource management for data centers: the ACTiCLOUD approach.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

Performance Prediction of NUMA Placement: A Machine-Learning Approach.
Proceedings of the 2018 IEEE International Conference on Cloud Computing Technology and Science, 2018

2017
An efficient and fair scheduling policy for multiprocessor platforms.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017


Improving QoS and Utilisation in modern multi-core servers with Dynamic Cache Partitioning.
Proceedings of the Joined Workshops COSH 2017 and VisorHPC 2017, 2017

RCU-HTM: Combining RCU with HTM to Implement Highly Efficient Concurrent Binary Search Trees.
Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017

2016
Massively Concurrent Red-Black Trees with Hardware Transactional Memory.
Proceedings of the 24th Euromicro International Conference on Parallel, 2016

Contention-Aware Scheduling Policies for Fairness and Throughput.
Proceedings of the Co-Scheduling of HPC Applications [extended versions of all papers from COSH@HiPEAC 2016, 2016

A resource-centric Application Classification Approach.
Proceedings of the 1st COSH Workshop on Co-Scheduling of HPC Applications, 2016

2014
LCA: a memory link and cache-aware co-scheduling approach for CMPs.
Proceedings of the International Conference on Parallel Architectures and Compilation, 2014

2013
Energy-Efficient Sparse Matrix Autotuning with CSX - A Trade-off Study.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

2012
Using State-of-the-Art Sparse Matrix Optimizations for Accelerating the Performance of Multiphysics Simulations.
Proceedings of the Applied Parallel and Scientific Computing, 2012

An Approach to Parallelize Kruskal's Algorithm Using Helper Threads.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

2009
Early experiences on accelerating Dijkstra's algorithm using transactional memory.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

Employing Transactional Memory and Helper Threads to Speedup Dijkstra's Algorithm.
Proceedings of the ICPP 2009, 2009

2008
An adaptive bloom filter cache partitioning scheme for multicore architectures.
Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, 2008


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