Konrad Lai
According to our database1,
Konrad Lai
authored at least 28 papers
between 1981 and 2016.
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Bibliography
2016
2014
Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014
Author retrospective for bloom filtering cache misses for accurate data speculation and prefetching.
Proceedings of the ACM International Conference on Supercomputing 25th Anniversary Volume, 2014
Improving in-memory database index performance with Intel<sup>®</sup> Transactional Synchronization Extensions.
Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014
2013
Performance evaluation of Intel® transactional synchronization extensions for high-performance computing.
Proceedings of the International Conference for High Performance Computing, 2013
2006
2005
Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005
Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005
A 10Mbit, 15GBytes/sec bandwidth 1T DRAM chip with planar MOS storage capacitor in an unmodified 150nm logic process for high-density on-chip memory applications.
Proceedings of the 31st European Solid-State Circuits Conference, 2005
2004
J. Instr. Level Parallelism, 2004
Proceedings of the 31st International Symposium on Computer Architecture (ISCA 2004), 2004
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004
Proceedings of the 10th International Conference on High-Performance Computer Architecture (HPCA-10 2004), 2004
2003
IEEE Trans. Very Large Scale Integr. Syst., 2003
Proceedings of the 17th Annual International Conference on Supercomputing, 2003
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003
2002
Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002
Proceedings of the 16th international conference on Supercomputing, 2002
2001
Direct load: dependence-linked dataflow resolution of load address and cache coordinate.
Proceedings of the 34th Annual International Symposium on Microarchitecture, 2001
Symbolic Cache: Fast Memory Access Based on Program Syntax Correlation of Loads and Stores.
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001
1992
Revisit the case for direct-mapped chaches: a case for two-way set-associative level-two caches.
Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, 1992
1990
Proceedings of the Intellectual Leverage: Thirty-Fifth IEEE Computer Society International Conference, 1990
1988
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988
1983
ACM Trans. Comput. Syst., 1983
1982
Proceedings of the Symposium on Architectural Support for Programming Languages and Operating Systems, 1982
1981
A Unified Model and Implementation for Interprocess Communication in a Multiprocessor Environment.
Proceedings of the Eighth Symposium on Operating System Principles, 1981