Kong-Pang Pun

IEEE J. Solid State Circuits, November, 2024

Stability analysis and optimization of CT DSMs with an NS SAR quantizer by a redistributed noise shaping technique.

[BibT_eX]

[DOI]

Weihao Wang

Microelectron. J., 2024

True random number generation using metastable 1T' molybdenum ditelluride.

[BibT_eX]

[DOI]

CoRR, 2024

Lightweight, error-tolerant edge detection using memristor-enabled stochastic logics.

[BibT_eX]

[DOI]

CoRR, 2024

2023

A Low-Power Keyword Spotting System With High-Order Passive Switched-Capacitor Bandpass Filters for Analog-MFCC Feature Extraction.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., November, 2023

A 13-Level SC DAC Achieving High Linearity With a Simple DEM for Wideband CT DSMs.

[BibT_eX]

[DOI]

Hetong Wang

Zhongxu Zheng

IEEE Trans. Circuits Syst. II Express Briefs, August, 2023

A 10-MHz 85.1-dB SFDR 1.1-mW continuous-time Delta-sigma modulator employing calibration-free SC DAC and passive front-end low-pass filter.

[BibT_eX]

[DOI]

Wei Jin

Microelectron. J., 2023

2021

A 0.59-mW 78.7-dB SNDR 2-MHz Bandwidth Active-RC Delta-Sigma Modulator With Relaxed and Reduced Amplifiers.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A 270 nW Switched-Capacitor Acoustic Feature Extractor for Always-On Voice Activity Detection.

[BibT_eX]

[DOI]

Erjia Shi

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A Current-Switching Technique for Intra-Body Communication With Miniaturized Electrodes.

[BibT_eX]

[DOI]

Weihao Wang

Bo Zhao

IEEE Trans. Biomed. Circuits Syst., 2021

2020

A 9.6 nW, 8-Bit, 100 S/s Envelope-to-Digital Converter for Respiratory Monitoring.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2020

A 0.032-mm<sup>2</sup> 43.3-fJ/Step 100-200-MHz IF 2-MHz Bandwidth Bandpass DSM Based on Passive N-Path Filters.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2020

A Power-Efficient 10-MHz Bandwidth Active-RC CTDSM with a Charge-Recycled Highly-Linear 5-Level SC DAC.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

Power-Efficient Gm-C DSMs With High Immunity to Aliasing, Clock Jitter, and ISI.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2019

An Extremely Linear Multi-Level DAC for Continuous-Time Delta-Sigma Modulators.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2019

A Highly Linear Multi-Level SC DAC in a Power-Efficient Gm-C Continuous-Time Delta-Sigma Modulator.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A 0.4-V 0.2 pJ/step 90-dB SNDR 20-kHz CT delta-sigma modulator using class-AB amplifier with a novel local common-mode feedback.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2019

An Automatic On-Chip Calibration Technique for Static and Dynamic DAC Error Correction in High-Speed Continuous-Time Delta-Sigma Modulators.

[BibT_eX]

[DOI]

IEEE Access, 2019

2018

An SAR ADC Switching Scheme With MSB Prediction for a Wide Input Range and Reduced Reference Voltage.

[BibT_eX]

[DOI]

Zhongyi Fu

IEEE Trans. Very Large Scale Integr. Syst., 2018

Improving Power Efficiency for Active-RC Delta-Sigma Modulators Using a Passive-RC Low-Pass Filter in the Feedback.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2018

A Gm-C Delta-Sigma Modulator With a Merged Input-Feedback Gm Circuit for Nonlinearity Cancellation and Power Efficiency Enhancement.

[BibT_eX]

[DOI]

Daxiang Li

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A Self-Clocked Resistive CMOS Smart Temperature Sensor for Wireless Sensor Networks.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2018

Power-Efficient Active-RC CT DSM with a Lowpass Capacitor at the Virtual Ground Node of the First Integrator.

[BibT_eX]

[DOI]

Daxiang Li

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

An On-Chip Static and Dynamic DAC Error Correction Technique for High Speed Multibit Delta-Sigma Modulators.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017

Continuous-time delta-sigma modulator with an upfront passive-RC low-pass network.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2017

2016

A 10-bit 2 MS/s SAR ADC using reverse VCM-based switching scheme.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Gm-cell nonlinearity compensation technique using single-bit quantiser and FIR DAC in Gm-C based delta-sigma modulators.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015

A 5.4-mW 180-cm Transmission Distance 2.5-Mb/s Advanced Techniques-Based Novel Intrabody Communication Receiver Analog Front End.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2015

A Resistor-Based Sub-1-V CMOS Smart Temperature Sensor for VLSI Thermal Management.

[BibT_eX]

[DOI]

Wai Tung Ng

IEEE Trans. Very Large Scale Integr. Syst., 2015

A Charge Recycling SAR ADC With a LSB-Down Switching Scheme.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A 5-ps Vernier sub-ranging time-to-digital converter with DNL calibration.

[BibT_eX]

[DOI]

Andreas Gothenberg

Microelectron. J., 2015

Next-Generation Delta-Sigma Converters: Trends and Perspectives.

[BibT_eX]

[DOI]

IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

Guest Editorial: Next-Generation Delta-Sigma Converters.

[BibT_eX]

[DOI]

IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

2014

Optimizing the Stage Resolution in Pipelined SAR ADCs for High-Speed High-Resolution Applications.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2014

A High-Linearity Capacitance-to-Digital Converter Suppressing Charge Errors From Bottom-Plate Switches.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

A High Image-Rejection SC Quadrature Bandpass DSM for Low-IF Receivers.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Design considerations of calibration DAC in self-calibrated SAR A/D converters.

[BibT_eX]

[DOI]

Microelectron. J., 2014

Simplifying HOG arithmetic for speedy hardware realization.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

2013

Architecture and Design Flow for a Highly Efficient Structured ASIC.

[BibT_eX]

[DOI]

S. Man Ho Ho

Yanqing Ai

Thomas Chun-Pong Chau

Steve C. L. Yuen

IEEE Trans. Very Large Scale Integr. Syst., 2013

Unit capacitor array based SAR ADC.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2013

A continuous-time cascaded delta-sigma modulator with PMW-based automatic RC time constant tuning and correlated double sampling.

[BibT_eX]

[DOI]

Microelectron. J., 2013

2012

A charge-pump and comparator based power-efficient pipelined ADC technique.

[BibT_eX]

[DOI]

Microelectron. J., 2012

Low-offset comparator using capacitive self-calibration.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2012

Novel overshoot cancellation in comparator-based pipelined ADC.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Analysis and Design of a 14-bit SAR ADC using self-calibration DAC.

[BibT_eX]

[DOI]

Alex K. Y. Wong

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

A chopper-stabilized high-pass Delta-Sigma Modulator with reduced chopper charge injection.

[BibT_eX]

[DOI]

Microelectron. J., 2011

A Novel Switched-Current Successive Approximation ADC.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2011

2010

A 0.5-Hz High-Pass Cutoff Dual-Loop Transimpedance Amplifier for Wearable NIR Sensing Device.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2010

A Low-Power Continuously-Calibrated Clock Recovery Circuit for UHF RFID EPC Class-1 Generation-2 Transponders.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2010

RF Module Design of Passive UHF RFID Tag Implemented in CMOS 90-nm Technology.

[BibT_eX]

[DOI]

Chiu-sing Choy

J. Low Power Electron., 2010

Practical placement and routing techniques for analog circuit designs.

[BibT_eX]

[DOI]

Linfu Xiao

Evangeline F. Y. Young

Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Structured ASIC: Methodology and comparison.

[BibT_eX]

[DOI]

Oliver C. S. Choy

Proceedings of the International Conference on Field-Programmable Technology, 2010

Design of a single layer programmable Structured ASIC library.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

Rapid prototyping on a structured ASIC fabric.

[BibT_eX]

[DOI]

Oliver C. S. Choy

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009

A 0.5-V Wideband Amplifier for a 1-MHz CT Complex Delta-Sigma Modulator.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2009

Special Issue on Circuits and Systems Solutions for Nanoscale CMOS Design Challenges.

[BibT_eX]

[DOI]

Lucien J. Breems

IEEE Trans. Circuits Syst. II Express Briefs, 2009

A Novel Mismatch Cancellation and I/Q Channel Multiplexing Scheme for Quadrature Bandpass DeltaSigma Modulators.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A Low-power Signal Processing Front-end and Decoder for UHF Passive RFID Transponders.

[BibT_eX]

[DOI]

Chi Fat Chan

Weiwei Shi

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A comparison of via-programmable gate array logic cell circuits.

[BibT_eX]

[DOI]

Thomas C. P. Chau

Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

2008

A Fully Differential Band-Selective Low-Noise Amplifier for MB-OFDM UWB Receivers.

[BibT_eX]

[DOI]

Siu-Kei Tang

IEEE Trans. Circuits Syst. II Express Briefs, 2008

A Low-Power CMOS Front-End for Photoplethysmographic Signal Acquisition With Robust DC Photocurrent Rejection.

[BibT_eX]

[DOI]

IEEE Trans. Biomed. Circuits Syst., 2008

Design of passive UHF RFID tag in 130nm CMOS technology.

[BibT_eX]

[DOI]

Chiu-sing Choy

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

Enhanced channel selection using digital low-IF in Weaver receiver architecture.

[BibT_eX]

[DOI]

Misteltein Pak-Kee Chan

Alex Ka Nang Leung

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007

A Speech Recognition IC Using Hidden Markov Models with Continuous Observation Densities.

[BibT_eX]

[DOI]

Wei Han

Kwok-Wai Hon

J. VLSI Signal Process., 2007

Power-Efficient VLSI Realization of a Complex FSM for H.264/AVC Bitstream Parsing.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2007

Correction to "A 0.5-V 74-dB SNDR 25-kHz Continuous-Time Delta-Sigma Modulator With a Return-to-Open DAC".

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2007

Author's Response.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2007

A 0.5-V 74-dB SNDR 25-kHz Continuous-Time Delta-Sigma Modulator With a Return-to-Open DAC.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2007

Priority-Based Heading One Detector in H.264/AVC Decoding.

[BibT_eX]

[DOI]

Ke Xu

EURASIP J. Embed. Syst., 2007

A DEM Scheme for I/Q Mismatch Compensation in Multi-Bit CT Delta Sigma Modulator.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Analog placement with common centroid constraints.

[BibT_eX]

[DOI]

Qiang Ma

Evangeline F. Y. Young

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

2006

A 75-dB image rejection IF-input quadrature-sampling SC ΣΔ Modulator.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2006

A 0.5V 74dB SNDR 25kHz CT ΔΣ Modulator with Return-to-Open DAC.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

Power-efficient VLSI implementation of bitstream parsing in H.264/AVC decoder.

[BibT_eX]

[DOI]

Ke Xu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

An ECG measurement IC using driven-right-leg circuit.

[BibT_eX]

[DOI]

Alex K. Y. Wong

Yuan-Ting Zhang

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A fully differential low noise amplifier with real-time channel hopping for ultra-wideband wireless applications.

[BibT_eX]

[DOI]

Siu-Kei Tang

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

An optimal normal basis elliptic curve cryptoprocessor for inductive RFID application.

[BibT_eX]

[DOI]

Pak-Keung Leung

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A 0.5V fully differential OTA with local common feedback.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

An efficient MFCC extraction method in speech recognition.

[BibT_eX]

[DOI]

Wei Han

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A 6-digit CMOS current-mode analog-to-quaternary converter with RSD error correction algorithm.

[BibT_eX]

[DOI]

Chi-Hong Chan

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Adiabatic Smart Card.

[BibT_eX]

[DOI]

King-Keung Mok

Ka-Hung Tsang

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

0.8 V GPS band CMOS VCO with 29% Tuning Range.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

Sub-1 V Current Mode CMOS Integrated Receiver Front-end for GPS System.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005

A near-infrared heart rate measurement IC with very low cutoff frequency using current steering technique.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2005

Active RC filter with reduced capacitance by current division technique.

[BibT_eX]

[DOI]

Nang-Ching Yeung

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A near-infrared heart rate sensor IC with very low cutoff frequency using current steering technique.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Ramp voltage supply using adiabatic charging principle.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Realization of card-centric framework: a card-centric computer [smart cards].

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A speech recognizer with selectable model parameters.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A 75dB image rejection IF-input quadrature sampling SC ΣΔ modulator.

[BibT_eX]

[DOI]

Proceedings of the 31st European Solid-State Circuits Conference, 2005

2004

Preparing smartcard for the future: from passive to active.

[BibT_eX]

[DOI]

IEEE Trans. Consumer Electron., 2004

An I/Q mismatch-free switched-capacitor complex sigma-delta Modulator.

[BibT_eX]

[DOI]

Chiu-sing Choy

José Epifânio da Franca

IEEE Trans. Circuits Syst. II Express Briefs, 2004

A low-latency asynchronous shift register.

[BibT_eX]

[DOI]

Ragnarok Pak-Kee Chan

IEEE Trans. Circuits Syst. II Express Briefs, 2004

A high-efficiency strongly self-checking asynchronous datapath.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Pipelines in Dynamic Dual-Rail Circuits.

[BibT_eX]

[DOI]

Jing-Ling Yang

Proceedings of the Integrated Circuit and System Design, 2004

An IF-sampling SC complex lowpass Sigma Delta modulator with high image rejection by capacitor sharing.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

An asynchronous SOVA decoder for wireless communication application.

[BibT_eX]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

An IF input continuous-time sigma-delta analog-digital converter with high image rejection.

[BibT_eX]

[DOI]

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

IP Generation for an FPGA-Based Audio DAC Sigma-Delta Converter.

[BibT_eX]

[DOI]

Proceedings of the Field Programmable Logic and Application, 2004

Card-Centric Framework - Providing I/O Resources for Smart Cards.

[BibT_eX]

[DOI]

Pak-Kee Chan

Proceedings of the Smart Card Research and Advanced Applications VI, 2004

A low power asynchronous Java processor for contactless smart card.

[BibT_eX]

[DOI]

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2003

Quadrature sampling schemes with improved image rejection.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2003

Reversed nested Miller compensation with voltage buffer and nulling resistor.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2003

Design for Self-Checking and Self-Timed Datapath.

[BibT_eX]

[DOI]

Jing-Ling Yang

Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

Clock recovery circuit with adiabatic technology (quasi-static CMOS logic).

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A low power asynchronous GF(2<sup>173</sup>) ALU for elliptic curve crypto-processor.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

An HMM-based speech recognition IC.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

An FPGA-based re-configurable 24-bit 96kHz sigma-delta audio DAC.

[BibT_eX]

[DOI]

Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, 2003

A contactless smartcard designed with asynchronous circuit technique.

[BibT_eX]

[DOI]

Proceedings of the ESSCIRC 2003, 2003

2002

A quadrature IF mixer with high image rejection for continuous-time complex Sigma-Delta modulators.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A CMOS current feedback operational amplifier with active current mode compensation.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A 1.2 V 900 MHz CMOS mixer.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A Totally Self-Checking Dynamic Asynchronous Datapath.

[BibT_eX]

[DOI]

Jing-Ling Yang

Proceedings of the 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA, 2002

A 900 MHz 1.2 V CMOS mixer with high linearity.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002

2001

A quadrature sampling scheme with improved image rejection for complex-IF receivers.

[BibT_eX]

[DOI]

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000

Wideband digital correction of I and Q mismatch in quadrature radio receivers.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999

Poly-phase switched-capacitor IIR Hilbert transformers.

[BibT_eX]

[DOI]

Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

1998

Basic principles and new solutions for analog sampled-data image rejection mixers.

[BibT_eX]

[DOI]