Koji Ohno
According to our database1,
Koji Ohno
authored at least 9 papers
between 1989 and 2009.
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Bibliography
2009
A 65 nm Single-Chip Application and Dual-Mode Baseband Processor With Partial Clock Activation and IP-MMU.
IEEE J. Solid State Circuits, 2009
2008
A 65nm Single-Chip Application and Dual-Mode Baseband Processor with Partial Clock Activation and IP-MMU.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
2007
A 390MHz Single-Chip Application and Dual-Mode Baseband Processor in 90nm Triple-Vt CMOS.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
2006
A Power Management Scheme Controlling 20 Power Domains for a Single-Chip Mobile Processor.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
Proceedings of the 2006 IEEE Hot Chips 18 Symposium (HCS), 2006
Hierarchical power distribution and power management scheme for a single chip mobile processor.
Proceedings of the 43rd Design Automation Conference, 2006
2005
Proceedings of the IEEE 16th International Symposium on Personal, 2005
1995
Proceedings of the 6th IEEE International Symposium on Personal, 1995
1989
IEEE Trans. Commun., 1989