Koji Kai

According to our database, Koji Kai authored at least 4 papers between 1998 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2011

Prospective Silicon Applications and Technologies in 2025.

Koji Kai, Minoru Fujishima

IEICE Trans. Electron., 2011

2000

Performance/Energy Efficiency of Variable Line-Size Caches for Intelligent Memory Systems.

Koji Inoue, Koji Kai, Kazuaki J. Murakami

Proceedings of the Intelligent Memory Systems, Second International Workshop, 2000

1999

Dynamically Variable Line-Size Cache Exploiting High On-Chip Memory Bandwidth of Merged DRAM/Logic LSIs.

Koji Inoue, Koji Kai, Kazuaki J. Murakami

Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, 1999

1998

Optimizing the DRAM refresh count for merged DRAM/logic LSIs.

Taku Ohsawa, Koji Kai, Kazuaki J. Murakami

Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998