Koichiro Noguchi
According to our database1,
Koichiro Noguchi
authored at least 10 papers
between 2005 and 2012.
Collaborative distances:
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Bibliography
2012
A 27% Active-Power-Reduced 40-nm CMOS Multimedia SoC With Adaptive Voltage Scaling Using Distributed Universal Delay Lines.
IEEE J. Solid State Circuits, 2012
A 280nW, 100kHz, 1-cycle start-up time, on-chip CMOS relaxation oscillator employing a feedforward period control scheme.
Proceedings of the Symposium on VLSI Circuits, 2012
2010
An Inductive-Coupling DC Voltage Transceiver for Highly Parallel Wafer-Level Testing.
IEEE J. Solid State Circuits, 2010
2009
Wireless DC voltage transmission using inductive-coupling channelfor highly-parallel wafer-level testing.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
2007
An On-Chip Multichannel Waveform Monitor for Diagnosis of Systems-on-a-Chip Integration.
IEEE Trans. Very Large Scale Integr. Syst., 2007
On-Chip Multi-Channel Monitoring for Analog Circuit Diagnosis in Systems-on-Chip Integration.
IEICE Trans. Electron., 2007
2006
An On-Chip Multi-Channel Rail-to-Rail Signal Monitoring Technique for Sub-100-nm Digital Signal Integrity.
IEICE Trans. Electron., 2006
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
2005
Proceedings of the 31st European Solid-State Circuits Conference, 2005
On-Chip Multi-Channel Waveform Monitoring for Diagnostics of Mixed-Signal VLSI Circuits.
Proceedings of the 2005 Design, 2005