Koichi Tachikake

According to our database, Koichi Tachikake authored at least 4 papers between 2003 and 2005.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2005

A SIMD Instruction Set and Functional Unit Synthesis Algorithm with SIMD Operation Decomposition.

Nozomu Togawa, Koichi Tachikake, Yuichiro Miyaoka, Masao Yanagisawa, Tatsuo Ohtsuki

IEICE Trans. Inf. Syst., 2005

2004

Instruction set and functional unit synthesis for SIMD processor cores.

Nozomu Togawa, Koichi Tachikake, Yuichiro Miyaoka, Masao Yanagisawa, Tatsuo Ohtsuki

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2003

A Hardware/Software Partitioning Algorithm for Processor Cores with Packed SIMD-Type Instructions.

Nozomu Togawa, Koichi Tachikake, Yuichiro Miyaoka, Masao Yanagisawa, Tatsuo Ohtsuki

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003

A hardware/software partitioning algorithm for SIMD processor cores.

Koichi Tachikake, Nozomu Togawa, Yuichiro Miyaoka, Jinku Choi, Masao Yanagisawa, Tatsuo Ohtsuki

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003