Kodai Yamada
According to our database1,
Kodai Yamada
authored at least 6 papers
between 2018 and 2021.
Collaborative distances:
Collaborative distances:
Timeline
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2019
2020
2021
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Bibliography
2021
A Deep Learning Technique for Electricity Price Forecasting in Consideration of Spikes.
Proceedings of the IEEE Region 10 Conference, 2021
2020
Evaluation of Heavy-Ion-Induced Single Event Upset Cross Sections of a 65-nm Thin BOX FD-SOI Flip-Flops Composed of Stacked Inverters.
IEICE Trans. Electron., 2020
2019
An Accurate Device-Level Simulation Method to Estimate Cross Sections of Single Event Upsets by Silicon Thickness in Raised Layer.
Proceedings of the IEEE International Reliability Physics Symposium, 2019
Impact of Combinational Logic Delay for Single Event Upset on Flip Flops in a 65 nm FDSOI Process.
Proceedings of the IEEE International Reliability Physics Symposium, 2019
Comparison of Radiation Hardness of Stacked Transmission-Gate Flip Flop and Stacked Tristate-Inverter Flip Flop in a 65 nm Thin BOX FDSOI Process.
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019
2018
Sensitivity to soft errors of NMOS and PMOS transistors evaluated by latches with stacking structures in a 65 nm FDSOI process.
Proceedings of the IEEE International Reliability Physics Symposium, 2018