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Kleanthis Papachatzopoulos

Orcid: 0000-0002-1193-7611

According to our database1, Kleanthis Papachatzopoulos authored at least 10 papers between 2016 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
Noise-Shaping Binary-to-Stochastic Converters for Reduced-Length Bit-Streams.
[BibTeX]
[DOI]
Kleanthis Papachatzopoulos
,
Vassilis Paliouras
IEEE Trans. Emerg. Top. Comput., 2023

Path-Based Delay Variation Models for Parallel-Prefix Adders.
[BibTeX]
[DOI]
Kleanthis Papachatzopoulos
,
Vassilis Paliouras
IEEE Trans. Emerg. Top. Comput., 2023

2022
Sensitivity to Threshold Voltage Variations of Exact and Incomplete Prefix Addition Trees.
[BibTeX]
[DOI]
Kleanthis Papachatzopoulos
,
Vassilis Paliouras
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
Sum Propagate Adders.
[BibTeX]
[DOI]
Giorgos Dimitrakopoulos
,
Kleanthis Papachatzopoulos
,
Vassilis Paliouras
IEEE Trans. Emerg. Top. Comput., 2021

A Novel Stochastic Polar Architecture for All-Digital Transmission.
[BibTeX]
[DOI]
Chris Andriakopoulos
,
Kleanthis Papachatzopoulos
,
Vassilis Paliouras
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Novel Noise-Shaping Stochastic-Computing Converters for Digital Filtering.
[BibTeX]
[DOI]
Kleanthis Papachatzopoulos
,
Chris Andriakopoulos
,
Vassilis Paliouras
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Maximum Delay Models for Parallel-Prefix Adders in the Presence of Threshold Voltage Variations.
[BibTeX]
[DOI]
Kleanthis Papachatzopoulos
,
Vassilis Paliouras
Proceedings of the 27th IEEE Symposium on Computer Arithmetic, 2020

2019
Static Delay Variation Models for Ripple-Carry and Borrow-Save Adders.
[BibTeX]
[DOI]
Kleanthis Papachatzopoulos
,
Vassilis Paliouras
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2018
Low-Power Addition With Borrow-Save Adders Under Threshold Voltage Variability.
[BibTeX]
[DOI]
Kleanthis Papachatzopoulos
,
Vassilis Paliouras
IEEE Trans. Circuits Syst. II Express Briefs, 2018

2016
Dynamic delay variation behaviour of RNS multiply-add architectures.
[BibTeX]
[DOI]
Kleanthis Papachatzopoulos
,
Ioannis Kouretas
,
Vassilis Paliouras
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016


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