Klaus von Arnim

According to our database, Klaus von Arnim authored at least 6 papers between 2005 and 2007.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2007

Advances in Multi-Gate MOSFET Circuit Design.

Michael Fulde, Klaus von Arnim, Christian Pacha, Florian Bauer, Christian Russ, Domagoj Siprak, Wade Xiong, Andrew Marshall, C. Rinn Cleavelin, Klaus Schruefer, Doris Schmitt-Landsiedel, Gerhard Knoblinger

Proceedings of the 14th IEEE International Conference on Electronics, 2007

Efficiency of low-power design techniques in Multi-Gate FET CMOS Circuits.

Christian Pacha, Klaus von Arnim, Florian Bauer, Thomas Schulz, Wade Xiong, K. T. San, Andrew Marshall, Thomas Baumann, C. Rinn Cleavelin, Klaus Schruefer, Jörg Berthold

Proceedings of the 33rd European Solid-State Circuits Conference, 2007

Analog design challenges and trade-offs using emerging materials and devices.

Michael Fulde, Abdelkarim Mercha, Cedric Gustin, Bertrand Parvais, Vaidyanathan Subramanian, Klaus von Arnim, Florian Bauer, Klaus Schruefer, Doris Schmitt-Landsiedel, Gerhard Knoblinger

Proceedings of the 33rd European Solid-State Circuits Conference, 2007

Layout options for stability tuning of SRAM cells in multi-gate-FET technologies.

Florian Bauer, Klaus von Arnim, Christian Pacha, Thomas Schulz, Michael Fulde, Axel Nackaerts, M. Jurczak, Wade Xiong, K. T. San, C. Rinn Cleavelin, Klaus Schruefer, Georg Georgakos, Doris Schmitt-Landsiedel

Proceedings of the 33rd European Solid-State Circuits Conference, 2007

2006

Circuit design issues in multi-gate FET CMOS technologies.

Christian Pacha, Klaus von Arnim, Thomas Schulz, Weize Xiong, Michael Gostkowski, Gerhard Knoblinger, Andrew Marshall, Thomas Nirschl, Jörg Berthold, Christian Russ, Harald Gossner, Charvaka Duvvury, Paul Patruno, C. Rinn Cleavelin, Klaus Schruefer

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005

Efficiency of body biasing in 90-nm CMOS for low-power digital circuits.

Klaus von Arnim, Eduardo Borinski, Peter Seegebrecht, Horst Fiedler, Ralf Brederlow, Roland Thewes, Jörg Berthold, Christian Pacha

IEEE J. Solid State Circuits, 2005