Klaus Herrmann

Affiliations:
  • Hannover University, Germany


According to our database1, Klaus Herrmann authored at least 7 papers between 1996 and 2001.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2001
Speicherarchitekturen für parallele Bildverarbeitungsprozessoren mit integriertem DRAM.
PhD thesis, 2001

2000
Self-Configuration of a Large Area Integrated Multiprocessor System for Video Applications.
Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 2000

Implementation of a Multiprocessor System with Distributed Embedded DRAM on a Large Area Integrated Circuit.
Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 2000

1999
Memory Organization of a Single-Chip Video Signal Processing System with Embedded DRAM.
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

1998
A MIMD-based video signal processing architecture suitable for large area integration and a 16.6-cm<sup>2</sup> monolithic implementation.
IEEE Trans. Very Large Scale Integr. Syst., 1998

A Video Signal Processor for MIMD Multiprocessing.
Proceedings of the 35th Conference on Design Automation, 1998

1996
Design of a development system for multimedia applications based on a single chip multiprocessor array.
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996


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