Klaus Harbich

According to our database, Klaus Harbich authored at least 8 papers between 1996 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2007

Incremental Fault Emulation.

Jan Torben Weinkopf, Klaus Harbich, Erich Barke

Proceedings of the FPL 2007, 2007

2006

Parsifal: A Generic and Configurable Fault Emulation Environment with Non-Classical Fault Models.

Jan Torben Weinkopf, Klaus Harbich, Erich Barke

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Test and reliability challenges in automotive microelectronics.

Christian Sebeke, C. Jung, Klaus Harbich, S. Fuchs, J. Schwarz, Peter Göhner

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2003

A timing driven RTL based design flow for multi-FPGA rapid prototyping systems.

Klaus Harbich

PhD thesis, 2003

2001

PuMA++: From Behavioral Specification to Multi-FPGA-Prototype.

Klaus Harbich, Erich Barke

Proceedings of the Field-Programmable Logic and Applications, 2001

1999

A Case Study: Logic Emulation - Pitfalls and Solutions.

Klaus Harbich, Jörn Stohmann, Erich Barke, Ludwig Schwoerer

Proceedings of the Tenth IEEE International Workshop on Rapid System Prototyping (RSP 1999), 1999

1998

An Optimized Design Flow for Fast FPGA-Based Rapid Prototyping.

Jörn Stohmann, Klaus Harbich, Markus Olbrich, Erich Barke

Proceedings of the Field-Programmable Logic and Applications, 1998

1996

Hierarchical partitioning.

Dirk Behrens, Klaus Harbich, Erich Barke

Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996